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Clock signal frequency verifying device and method

A clock signal and verification method technology, applied in the direction of frequency measurement device, etc., can solve the problem of inability to effectively verify the frequency accuracy of the clock signal source 10

Inactive Publication Date: 2004-10-13
威盛电子(深圳)有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, it is obvious that the above-mentioned common means cannot effectively verify whether the frequency accuracy of the clock signal source 10 meets the requirements,

Method used

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  • Clock signal frequency verifying device and method
  • Clock signal frequency verifying device and method

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Embodiment Construction

[0026] See figure 2 , the present invention is a schematic block diagram of a preferred embodiment developed for a clock signal frequency verification device, which is mainly used to verify the accuracy of a clock signal source 20, and the device mainly includes a frequency divider 21 and a comparison detector 22 , the frequency divider 21 receives a clock signal to be measured outputted by the clock signal source 20, and corresponding to the activation of a reset signal, starts to act in response to the triggering of the clock signal to be measured, and then outputs a bipotential frequency division After the signal to be tested, the clock signal to be tested has a first period T1, the frequency-divided signal to be tested has a second period T2, and T2 / n=T1 (n is a multiple of frequency division). As for the comparison detector 22, corresponding to the activation of the reset signal and the triggering of the reference clock signal, every predetermined cycle Ts detects the si...

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Abstract

The present invention, clock signal frequency verifying device and method are used in verification process of clock signal source. The device includes one reference clock signal and reset signal producing source, one frequency divider and one comparing detector. The method includes inputting a tested clock signal to the frequency divider; triggering the frequency divider corresponding to a activating reset signal to output a double-level frequency-dividing tested signal; detecting the signal level in a certain time internal; and judging whether the clock signal source is in normal operation state and finding out the period error range of the clock signal to be tested.

Description

technical field [0001] The invention relates to a clock signal frequency verification device and method, in particular to a clock signal frequency verification device and method used in the integrated circuit testing process. Background technique [0002] In today's various circuit devices, the clock signal is an important signal that is indispensable for coordinating the operation of various components. Therefore, in a test and verification procedure performed after a circuit device is manufactured, it must include the generation of the clock. A test verification action performed by a clock signal source of the signal. See figure 1 , which is a schematic block diagram of a commonly used test device for performing a test verification action on a clock signal source, which is mainly completed by a frequency divider 11 and a detection circuit 12, because the clock signal source 10 (usually an oscillator or a phase-locked The frequency of the clock signal generated by the loo...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01R23/02
Inventor 席振华吴政原翁志贤
Owner 威盛电子(深圳)有限公司