Negative voltage level converting circuit
A technology for converting circuits and negative voltages, applied in the direction of logic circuit connection/interface layout, logic circuit coupling/interface using field effect transistors, static memory, etc., which can solve the problem of increasing the complexity of the manufacturing process and undisclosed negative voltage level conversion The same or similar circuits and other issues, to achieve the effect of low power consumption and fast level conversion speed
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[0024] The specific embodiment of the present invention will be described with reference to the accompanying drawings.
[0025] Figure 4 It is the negative voltage level conversion circuit proposed by the present invention, which is composed of high-voltage PMOS transistors 503-506, high-voltage NMOS transistors 501, 502 and a CMOS inverter 507 working at VDD voltage.
[0026] The drain of the high-voltage PMOS transistor 504 is connected to the node outb (the drain of the NMOS transistor 501 ), the gate is connected to the output node out (the drain of the NMOS transistor 502 ), and the source is connected to the input terminal A. The drain of the high-voltage PMOS transistor 505 is connected to the node outb, the gate is fixedly grounded, and the source is connected to the input terminal A. The drain of the high-voltage PMOS transistor 503 is connected to the output node out, the gate is connected to the node outb, and the source is connected to the output terminal B of th...
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