Control device and method for reducing interruption frequency of processor

Abstract

It is a kind of control apparatus and method that can reduce the interruption time of processor in a real-time system. The said control apparatus comprises: a buffer, an interruption control unit, and an assistant meter. The said interruption control unit receives an interruption and sends out an interrupt signal to a processor selectively. The said interruption control unit has a timer. The assistant meter can store the interruption term and execution time that corresponding to each interruption in the said buffer. When the said interruption control unit receives the said interruption, it stores the relevant information of said interruption to the said buffer. Then by comparing the interruption term of said interruption and the execution time of each interruption in the said buffer, it sends out the said interrupt signal selectively according to the comparing result.

Description

technical field [0001] The present invention relates to a control device and method for reducing the number of interrupts to a processor, especially a control device with an interrupt controller and a buffer. Background technique [0002] In a general real-time system (please refer to FIG. 1), when an external device 100, such as an I / O device or a bus, raises an interrupt to an execution unit 101, such as a central processing unit (CPU), a digital signal processor (DSP), When required, the execution unit 101 receives the interrupt and immediately executes an interrupt service routine (Interrupt Service Routine, ISR) corresponding to the interrupt request. [0003] However, when the external device 100 repeatedly raises many interrupt requests, these interrupt requests do not necessarily need to be processed immediately by the execution unit, and if the execution unit 101 repeatedly processes the interrupt request and executes the corresponding interrupt When servicing rout...

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Problems solved by technology

[0003] However, when the external device 100 repeatedly raises many interrupt requests, these interrupt requests do not necessarily need to be processed immediately by the execution unit, and if the execution unit 101 repeatedly processes the interrupt request and executes the corresponding interrupt When servicing routines, it is easy to cause the CPU to execute the operation process or the DSP processing program to be repeatedly interfered, resulting in reduced system performance and increasing the difficulty of eliminating errors, which will cause unpredictable interference to the entire system and may affect the operation of the entire system. efficacy

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