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Converting system and method containing symbol-digit format

A digital conversion and bit number technology, applied in the field of binary number calculation, which can solve the problems of reducing circuit complexity and delay value, etc.

Active Publication Date: 2004-09-01
VIA TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] The purpose of the present invention is to solve the above-mentioned shortcomings of binary number calculation and propose a system and method that can reduce circuit complexity and delay value during calculation

Method used

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  • Converting system and method containing symbol-digit format
  • Converting system and method containing symbol-digit format
  • Converting system and method containing symbol-digit format

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Embodiment Construction

[0035] Please refer now to the attached drawings. These drawings are only used for illustration of preferred embodiments of the present invention, and do not limit the present invention to the contents as shown in the drawings. in, image 3 The calculation circuit 20 of the preferred embodiment of the present invention is illustrated, and is used to calculate the value of (A+B)·C. The circuit 20 has a Carry Store Adder (CSA) to a Booth encoder 22 for encoding A+B, which will be described in more detail below. The A+B value is then fed into a multiplier 24, which also receives the C value, then multiplies A+B and C, and then outputs the final result (A+B)·C.

[0036] The CSA-to-Booth encoder 22 provides a novel conversion method, which converts the sum of A and B into a sign-digit redundant form, which is multiplied by the C value in the multiplier 24 . Fig. 4 shows the structure of each encoder unit 28, wherein each bit position of this unit 28 is the same as image 3 . I...

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Abstract

The invention is a system and method for converting two binary numbers into sign digit redundant form. The system at least includes the first adder, the second adder, and the third adder. The first adder is used to add up to binary numbers and generate the first result; the second adder is used to add the first carry of the former number into the first result, and when the first result is bigger than a starting critical value, it subtracts a value which is equal to the root bits of the binary number from the first result, in order to generate a middle result; the third adder is used the second carry acquired form the former number into the middle result, and it subtracts the root value form the middle result when the middle result when the middle result is bigger than default, in order to make the binary number accordance to the sing digit redundant form.

Description

technical field [0001] The invention relates to a conversion system and method, belonging to the technical field of binary number calculation, in particular to a system and method for converting binary numbers into a sign-digit redundant form. Background technique [0002] To build smaller binary multipliers, binary numbers are often used in hardware design in sign-digit notation. When the single digit of the binary number is designed to be larger, then the total number of digits can be reduced. For this reason, suitable number counting systems are often chosen to have certain radixes, the most popular systems using sign-digit numbers with a radix of 4. At this time, every two digits of a number are replaced by a digit, and the value of the digit is one of {-2, -1, 0, 1, 2}. An advantage of the root digit system is that the partial product obtained by multiplying the digit by a second argument can be obtained with only logical operations. For example, the partial product ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/52G06F7/53G06F7/533H03M7/02H03M7/04H03M7/06
CPCG06F7/5332G06F7/5318H03M7/04
Inventor 柏瑞斯·柏克潘克提莫·佩塔西德瑞克·格兰丁
Owner VIA TECH INC