Combined static RAM and mask ROM storage unit
A static random access, read-only memory technology, applied in static memory, read-only memory, digital memory information and other directions, can solve problems such as inefficiency
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[0013] The storage unit provided by the present invention is as figure 1 As shown, it includes a static random access unit 10 (for convenience of discussion and reading, hereinafter referred to as SRAM cell), and a masked read-only memory unit 20 (for convenience of discussion and reading, hereinafter referred to as ROM cell).
[0014] SRAM cen 10 is a storage structure for one-bit data, which can temporarily hold the one-bit data, and at a later time, transmit the data to the computing environment according to the execution instructions required by the central processing unit.
[0015] Such as figure 1 As shown, the SRAM celllo includes six transistors, which are the first transistor Q1, the second transistor Q2, the third transistor Q3, the fourth transistor Q4, the fifth transistor Q5, and the sixth transistor Q6, which is a six-transistor architecture One-bit storage unit, a pair of CMOS inverters (Inverter) are connected to form flip-flops (Flip Flop), storage nodes N1 a...
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