Clock reference device and method for IP network transmission base station
An IP network and clock reference technology, applied in the direction of synchronous signal speed/phase control, etc., can solve the problems of slow response to abnormal reference source, slow convergence, and inability to judge abnormal reference source, etc., and achieve the effect of clock convergence and fast clock convergence
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Embodiment 1
[0055] In this embodiment, the RNC at the sending end sends a synchronization packet dedicated to base station clock synchronization with a cyclic sequence number at a fixed time interval. The synchronization packet may introduce time delay and jitter during transmission through the IP network, so when receiving The end base station uses the ACM to track the clock synchronization information of the RNC, thereby ensuring the clock synchronization between the base station and the RNC.
[0056] The sending process on the RNC side is relatively simple. It can send a synchronization packet with a cyclic sequence number at a fixed time interval under the control of the system clock of the RNC device. The purpose of the sequence number is to identify the sending order of each synchronization packet. The sequence number can be represented by 12 Bit composition, cycle from 0 to 4095 cycles. The rate at which the RNC sends synchronization packets should take into account the occupied ba...
Embodiment 2
[0072] In this embodiment, the actual service characteristics of the data network are fully considered, and the network operation is monitored in real time. When the network load is light, the adaptive clock recovery method ACM is used on the base station side to quickly track the clock synchronization information of the RNC. The specific method is similar to the first embodiment. ; When the network performance is poor and it is not suitable for the base station to track the clock synchronization information of the RNC, the base station uses its own OXCO to be in a holding state.
[0073] see below figure 2 Specifically describe this embodiment, figure 2 It is a schematic diagram of implementing base station clock synchronization according to Embodiment 2 of the present invention.
[0074] Usually, the RNC realizes the pre-synchronization process with the base station by sending timing packets, and the base station analyzes the received timing packets to determine the delay...
Embodiment 3
[0087] The above two embodiments describe in detail the process for the base station to overcome the time delay and jitter of the IP transmission network and maintain clock synchronization with the RNC. However, the delay and jitter introduced by the IP network mainly include two parts: one is the delay and jitter introduced by the IP transmission network; Delay and jitter introduced during processing. Embodiment 1 and Embodiment 2 mainly describe the solution to the delay and jitter introduced by the IP transmission network. In order to obtain better clock synchronization characteristics, it is possible to reduce the delay and jitter caused by the protocol stacks and operating systems at both ends of the clock synchronization. Make the sending and receiving processing of timing packets / synchronization packets as close as possible to the physical layer. For example, the above base station clock recovery method can be directly processed at the physical layer. In addition, on ...
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