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Method and apparatus for aligning time references when separated by an unreliable data packet network

A technology for calibrating time and clock time, which is applied in time division multiplexing systems, electrical components, multiplexing communications, etc.

Inactive Publication Date: 2012-11-14
SEMTECH CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

These random delays prevent the slave clock from maintaining synchronization to the master clock within the required bounds

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  • Method and apparatus for aligning time references when separated by an unreliable data packet network
  • Method and apparatus for aligning time references when separated by an unreliable data packet network
  • Method and apparatus for aligning time references when separated by an unreliable data packet network

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Embodiment Construction

[0024] The present invention is directed to a time control mechanism that accepts a sample of time (true or false) on the network. As demonstrated by the exemplary embodiments of the present invention, the time control mechanism uses methods and apparatus for maintaining multiple samples, such as error detection and correction methods and apparatus. The timing control mechanism demonstrated should also adjust the output frequency and phase of the slave clock. The adjustment is controlled using other embodiments of the invention. A slave clock controlled by an exemplary timing control mechanism may be a slave clock as described in IEEE-1588. However, the timing control mechanism presented is not limited to IEEE-1588 based applications.

[0025] More specifically, the present invention provides a method and apparatus for a time control mechanism that dynamically compensates for random delays of a network to maintain the output of a time control mechanism controlled slave clock...

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Abstract

A time control mechanism accepts samples of time (true or otherwise) over a network, and enables dynamic compensation for random delays of the network in order to maintain the output of a slave clock that the time control mechanism controls within required bounds relative to the time of a master clock, even when the samples are randomly delayed. In one embodiment, a hardware timestamping method and apparatus is provided. The hardware timestamping method and apparatus is used to achieve the fine resolution required for timestamping both received samples and transmitted requests. In another embodiment, a delay-variation-smoothing method and apparatus is provided. The delay-variation-smoothing method and apparatus allows the time control mechanism to calculate the network delay in order to maintain the slave clock within the required time bounds. Moreover, a method and apparatus is provided that not only compensates for the random delays in the samples but also dynamically adjusts its operations to suit the changing characteristics of the delay path (typically a network).

Description

[0001] relevant application data [0002] This application claims priority under 35 U.S.C § 119(c) to provisional application 60 / 543,340, filed February 9, 2004. technical field [0003] The present invention relates to the field of timing control methods and apparatus, and more particularly to a timing control mechanism for providing a copy of time, a stable frequency and / or a signal locked to a remote point. Background technique [0004] Timing relationships are an important aspect of measurement and control of electronic systems. As such electronic systems become more complex and physically distributed, precise synchronization of time signals is increasingly required, but at the same time difficult to achieve. In order to solve the need for clock synchronization in network systems, the Institute of Electrical and Electronics Engineers (IEEE) adopts IEEE-1588 ("Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems"). [000...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04J3/06H04B7/212
CPCH04J3/0673H04J3/0682H04J3/0697H04J3/0664
Inventor 弗农·米德尔顿大卫·罗保罗·拉什顿大卫·汤克斯
Owner SEMTECH CORP