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Internal signal generator for use in semiconductor memory device

A storage device, semiconductor technology, applied in static memory, digital memory information, information storage, etc., can solve problems such as current consumption

Inactive Publication Date: 2007-04-04
SK HYNIX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, the internal signal generator shown in Figure 3 causes unnecessary current consumption

Method used

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  • Internal signal generator for use in semiconductor memory device
  • Internal signal generator for use in semiconductor memory device
  • Internal signal generator for use in semiconductor memory device

Examples

Experimental program
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Embodiment Construction

[0036] Hereinafter, a semiconductor memory device according to the present invention will be described in detail with reference to the accompanying drawings.

[0037] FIG. 4 is a block diagram of an internal signal generator for a semiconductor memory device according to an embodiment of the present invention.

[0038] The internal signal generator includes a pipe latch control unit 100 , a pipe latch unit 200 and an output driving unit 300 . The pipe latch control unit 100 sequentially enables the pipe input signals PI each time the external read command EXT_RD or the external write command EXT_WT is input. The pipe latch control unit 100 also sequentially enables the pipe output signals PO each time the internal read command INT_RD or the internal write command INT_WT is input. The pipe latch unit 200 includes a plurality of pipe latches, such as a first pipe latch 210, wherein each pipe latch latches an external address EXT_ADDR in response to a corresponding pipe input si...

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Abstract

A semiconductor memory device includes a pipe latch unit having a plurality of pipe latches, each of which latches an external address in response to the activation of an external command and outputs an internal address in response to the activation of an internal command corresponding to the external command. A pipe latch control unit is configured to control the pipe latch unit to sequentially enable the plurality of pipe latches. An output drive unit is configured to selectively output the internal address or the external address. The internal command is activated after a predetermined latency from an activation timing of the external command.

Description

technical field [0001] The present invention relates to a semiconductor memory device, and more particularly to an internal signal generator used in a semiconductor memory device for reducing current consumption. Background technique [0002] A semiconductor memory device generally receives an external column command, such as an external read command or an external write command, after an active command is input and an operation in response to the active command is completed immediately. Hereinafter, the delay between the input of the activate command and the input of the external column command is referred to as tRCD. An address input together with the external column command is input after tRCD. However, a semiconductor memory device such as a DDR2 SDRAM may set the input timing of an external column command even before tRCD. The semiconductor memory device holds an external column command input before tRCD for a predetermined time, and generates an internal column comma...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/4096
CPCG11C7/1063G11C7/109G11C7/22G11C8/18G11C11/4076G11C11/408
Inventor 辛范柱
Owner SK HYNIX INC