Semiconductor wafer, semiconductor chip, and manufacturing method of semiconductor device

Abstract

By using a small number of needles and contact terminals at burn-in, electric contact check is performed between each needle and each terminal provided in each semiconductor chip, and thereby the yield of assembled products can be improved. A packaging structure in which, for example, a volatile memory chip and a nonvolatile memory chip are formed is assembled in accordance with a production scheme in which burn-in of each memory chip is performed while still under the state of a semiconductor wafer, and by forming the packaged structure using the good volatile memory chip subjected to burn-in and likewise, also, the nonvolatile memory chip. At this burn-in, contact check is performed by bringing a needle, provided in a burn-in board, into contact with, for example, six test-only signal terminals of a test circuit formed on each semiconductor chip.

Description

[0001] This application is a continuation of U.S. application Ser. No. 10 / 764,539, filed Jan. 27, 2004, which, in turn, is a continuation of U.S. application Ser. No. 09 / 906,060, filed Jul. 17, 2001, now U.S. Pat. No. 6,711,075, the entire disclosures of which are incorporated herein by reference.TECHNICAL FIELD OF THE INVENTION [0002] The present invention relates to a burn-in technique of a semiconductor device. The present invention also relates to, for example, in a semiconductor device like a MCP (Multi Chip Package) having two semiconductor chips thereof formed as a SRAM, a flash memory and the like, a technique effectively applied to a test system suitable for a contact check method used between each needle and each terminal of the semiconductor chips at burn-in performed under the state of a semiconductor wafer. BACKGROUND OF THE INVENTION [0003] As a technique that the present inventors have studied, a burn-in technique of the semiconductor device is considered as follows. ...

AI Technical Summary

Benefits of technology

[0007] An object of the present invention is to provide a test system of a semiconductor device, wherein, while a method of performing the burn-in at a stage of semiconductor wafer is applied, improvement of the yield of assembling products can be achieved by using a small number of needles and a small number of contact terminals at the burn-in, performing an electric contact check between each needle and each terminal of semiconductor chips, and utilizing good semiconductor chips subjected to the burn-in.

Problems solved by technology

For example, in a method of performing the burn-in after assembly of the MCPs, as described above, yield of each semiconductor chip of the SRAM and the flash memory largely affects that of the assembled MCPs, so that there is status not being capable of expectedly improving the yield of the MCPs.

That is, in case of adopting this method, if either semiconductor chip of the SRAM or the flash memory becomes bad, MCPs assembled by using these bad semiconductor chips also become bad in quality and it seems thereby that the yield of the assembled products decreases.

However, it is difficult to make this current-detecting method of applying the voltage corresponding to a multi-pin scheme depending on the number of terminals in accordance with high performance and large capacity of the recent semiconductor devices.

That is, as the number of terminals of the semiconductor chips increases, needles, ammeters and the like corresponding to this number of terminals are required and, hence, these increasing numbers become enormous.

Therefore, it is difficult to use practically the current-detecting method.

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