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Semiconductor device and manufacturing method therefor

a technology of semiconductors and semiconductors, applied in semiconductor/solid-state device manufacturing, basic electric elements, electric devices, etc., can solve problems such as degrading the reliability of gate insulation films or the like, and achieve the effect of easy silicid

Inactive Publication Date: 2006-05-18
KK TOSHIBA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0010] A method of manufacturing a semiconductor device according to further embodiment of the present invention comprises forming a gate insulation film on a semiconductor substrate; depositing a gate electrode material on the gate insulation film; depositing a silicidation restricting material on the gate electrode material, the silicidation restricting material being less easily silicided than the gate electrode material; forming a first gate electrode and a second gate electrode, which have the silicidation restricting material on the upper surfaces thereof, on the gate insulation film by patterning the silicidation restricting material

Problems solved by technology

This may degrade the reliability of the gate insulation film or the like.

Method used

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  • Semiconductor device and manufacturing method therefor
  • Semiconductor device and manufacturing method therefor
  • Semiconductor device and manufacturing method therefor

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Experimental program
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first embodiment

[0041]FIG. 1 to FIG. 4 are cross-sectional diagrams showing a flow of a method of manufacturing a semiconductor device according to a first embodiment of the present invention. For convenience sake, these diagrams show one full silicide MOSFET and one normal silicide MOSFET, respectively. In actual practice, many full silicide MOSFETs and many normal silicide MOSFETs are formed on a silicon substrate. For example, it is considered to employ a full silicide MOSFET for a core circuit part of a semiconductor device and employ a normal silicide MOSFET for a peripheral circuit part. As a result, since a leak current through the gate insulation film decreases, the semiconductor device possesses higher reliability. A full silicide MOSFET may be employed for a logic part of a semiconductor device and a normal silicide MOSFET may be employed for an analog part. As a result, since threshold voltages of the transistors become lower, the operation speed of the semiconductor device increases.

[0...

second embodiment

[0058]FIG. 8 to FIG. 10 are cross-sectional diagrams showing a flow of a method of manufacturing a semiconductor device according to a second embodiment of the present invention. First, the configuration as shown in FIG. 1 is obtained in a process similar to that according to the first embodiment. Next, the photoresist 90 is coated as a mask material on the first and the second gate electrodes 40 and 42. As shown in FIG. 8, the photoresist 90 is patterned to expose the upper surface of the second gate electrode 42 while keeping the first gate electrode 40 covered with the photoresist 90. Nitrogen ions are implanted into the second gate electrode 42 using the photoresist 90 as a mask, for example. As a result, a nitrogen-implanted layer 43 that is less easily silicided than polysilicon is formed as a silicidation restricting layer inside the second gate electrode 42. The nitrogen-implanted layer 43 is provided between the polysilicon layer 41 and the polysilicon layer 45. As explaine...

third embodiment

[0062]FIG. 11 to FIG. 13 are cross-sectional diagrams showing a flow of a method of manufacturing a semiconductor device according to a third embodiment of the present invention. First, the configuration as shown in FIG. 1 is obtained in a process similar to that according to the first embodiment. Next, the photoresist 90 is coated as a mask material on the first and the second gate electrodes 40 and 42, respectively. As shown in FIG. 11, the photoresist 90 is patterned to expose the upper surface of the first gate electrode 40 while keeping the second gate electrode 42 covered with the photoresist 90. Germanium ions or silicon ions are implanted into the first gate electrode 40 using the photoresist 90 as a mask. As a result, polysilicon on the upper part of the first gate electrode 40 becomes amorphous silicon. With this arrangement, the first gate electrode 40 has a two-layer configuration including the amorphous silicon layer 49 and a polysilicon layer 48.

[0063] After the photo...

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PUM

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Abstract

A method of manufacturing a semiconductor device comprises forming a gate insulation film on a semiconductor substrate; forming a first gate electrode and a second gate electrode on the gate insulation film; forming a mask material so as to expose an upper surface of the first gate electrode while keeping the second gate electrode covered; etching an upper part of the first gate electrode by using the mask material as a mask; removing the mask material; depositing a metal film on the first gate electrode and the second gate electrode; and siliciding the whole of the first gate electrode and an upper part of the second gate electrode.

Description

CROSS-REFERENCE TO RELATED APPLICATION [0001] This application is based upon and claims the benefit of priority from the prior Japanese Patent Applications No. 2004-328673, filed on Nov. 12, 2004, the entire contents of which are incorporated herein by reference. BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] The present invention relates to a semiconductor device and a method of manufacturing the same. [0004] 2. Background Art [0005] Recently, manufacturing both a MOSFET having the whole gate electrode silicided (hereinafter referred to as a full silicide MOSFET) and a MOSFET having only an upper part of the gate electrode silicided (hereinafter referred to as a normal silicide MOSFET) on a same semiconductor substrate is considered. [0006] However, in order to form a full silicide MOSFET and a normal silicide MOSFET on the same substrate, it is necessary to individually form a gate electrode of the full silicide MOSFET and the normal silicide MOSFET, respectiv...

Claims

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Application Information

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IPC IPC(8): H01L21/8234
CPCH01L21/823443H01L21/82345
Inventor SAITO, TOMOHIRO
Owner KK TOSHIBA