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Microelectronic assemblies and methods of making microelectronic assemblies

a technology of microelectronic assemblies and microelectronic components, which is applied in the direction of semiconductor devices, semiconductor/solid-state device details, electrical apparatus, etc., can solve the problems of long lead lengths, difficult chip testing, and complex devices including semiconductor chips that may require hundreds of electrical connections, so as to minimize the creation of voids

Inactive Publication Date: 2006-05-25
BEROZ MASUD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

"The present invention provides a method of making microelectronic packages by attaching a substrate with conductive leads to a flexible dielectric sheet, and then placing a semiconductor wafer with contacts on its front and back surfaces face-to-face with the substrate. A spacer material is used to hold the wafer at a precise height above the substrate, and the assembly is then moved to vertically extend the leads between the substrate and wafer. The invention also includes a method of making microelectronic packages using a vacuum to hold the substrate and a spacer material to hold the semiconductor wafer in a stationary position during the process. The technical effects of the invention include improved precision in the attachment of microelectronic elements to the substrate, reduced voids in the curable liquid material used to connect the elements, and improved reliability and stability of the microelectronic assembly."

Problems solved by technology

For example, a complex device including a semiconductor chip may require hundreds of electrical connections between the chip and one or more external devices.
Each of these techniques presents various problems including difficulty in testing the chip after bonding, long lead lengths, large areas occupied by the chip on a microelectronic assembly, and fatigue of the connections due to changes in size of the chip and the substrate during thermal expansion and contraction.

Method used

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  • Microelectronic assemblies and methods of making microelectronic assemblies
  • Microelectronic assemblies and methods of making microelectronic assemblies
  • Microelectronic assemblies and methods of making microelectronic assemblies

Examples

Experimental program
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Embodiment Construction

[0027] Referring to FIG. 1, a flexible substrate 20, such as a flexible, dielectric film, includes a first surface 22 and a second surface 24 remote therefrom. The flexible substrate 20 is secured to a carrier frame 26, such as that disclosed in commonly assigned U.S. Pat. No. 6,049,972, the disclosure of which is hereby incorporated by reference herein. Referring to FIG. 2, the flexible substrate 20 includes a plurality of flexible conductive leads 28 formed on the first surface 22 of flexible substrate 20. The flexible conductive leads 28 may be made from a wide variety of conductive materials, including gold, aluminum, copper and their alloys. Each conductive lead 28 desirably includes a first end 30 that is permanently secured to the flexible substrate 20 and a second end 32 that is movable relative to first end 30 of lead 28. In certain preferred embodiments, the second ends 32 of the leads 28 are preferably releasably secured to and moveable away from the top surface 22 of fle...

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Abstract

A microelectronic subassembly includes a substrate having a first surface, and one or more microelectronic elements positioned above the first surface of the substrate, each microelectronic element having a contact bearing face confronting the first surface of the substrate and a back surface remote therefrom. The subassembly includes a substantially rigid plate attached to the back surfaces of the microelectronic elements, an array of flexible leads extending between the substrate and the microelectronic elements, the leads having first ends attached to the substrate and second ends attached to the contacts of the microelectronic elements, and an at least partially cured spacer material sandwiched between the substantially rigid plate and the substrate for holding the contact bearing faces of the microelectronic elements at a precise height above the substrate.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS [0001] The present application is a divisional of U.S. patent application Ser. No. 09 / 956,448, filed Sep. 19, 2001, now allowed, which claims benefit of U.S. Provisional Application Ser. No. 60 / 236,328, filed Sep. 29, 2000, the disclosures of which is hereby incorporated by reference herein.FIELD OF THE INVENTION [0002] The present invention relates to microelectronic packages having leads and specifically relates to methods of making microelectronic packages having arrays of vertically extended leads. BACKGROUND OF THE INVENTION [0003] Complex microelectronic devices such as semiconductor chips typically require numerous connections to other electronic components. For example, a complex device including a semiconductor chip may require hundreds of electrical connections between the chip and one or more external devices. These electrical connections may be made using several alternative methods, including wire bonding, tape automated bonding a...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L23/48H01L21/48H05K13/04
CPCH05K13/046H01L2224/16225Y10T29/49146Y10T29/49169Y10T29/49147Y10T29/49144Y10T29/49149Y10T29/4913H01L2924/00014H01L2224/0401
Inventor BEROZ, MASUDWARNER, MICHAEL
Owner BEROZ MASUD