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Methods of making microelectronic packages

a technology of microelectronic packages and lead strips, which is applied in the direction of printed circuit manufacturing, electrical apparatus construction details, manufacturing tools, etc., can solve the problems of long lead lengths, difficult chip testing, and complex devices including semiconductor chips that may require hundreds of electrical connections, so as to minimize the creation of voids

Inactive Publication Date: 2005-11-01
TESSERA INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0012]In certain preferred embodiments, the spacer material forms a dam that extends around the perimeter of the substantially rigid plate. The spacer material preferably has an inlet and an outlet so that a curable liquid material may be introduced through the inlet and into a gap extending between the substantially rigid plate and the substrate. The curable liquid material preferably includes epoxies, flexibilized epoxies, and silicones. In preferred embodiments, the curable liquid material is curable to form an elastomer. In one particularly preferred embodiment, the curable liquid material is curable to a silicone elastomer. The curable liquid encapsulant may be introduced under pressure or may enter the gap between the plate and substrate by capillary action. As the encapsulant is introduced through the inlet, the outlet of the spacer material allows air in the gap to escape through the outlet so as to minimize the creation of voids in the curable liquid material when such material is cured.

Problems solved by technology

For example, a complex device including a semiconductor chip may require hundreds of electrical connections between the chip and one or more external devices.
Each of these techniques presents various problems including difficulty in testing the chip after bonding, long lead lengths, large areas occupied by the chip on a microelectronic assembly, and fatigue of the connections due to changes in size of the chip and the substrate during thermal expansion and contraction.

Method used

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  • Methods of making microelectronic packages
  • Methods of making microelectronic packages
  • Methods of making microelectronic packages

Examples

Experimental program
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Embodiment Construction

[0027]Referring to FIG. 1, a flexible substrate 20, such as a flexible, dielectric film, includes a first surface 22 and a second surface 24 remote therefrom. The flexible substrate 20 is secured to a carrier frame 26, such as that disclosed in commonly assigned U.S. Pat. No. 6,049,972, the disclosure of which is hereby incorporated by reference herein. Referring to FIG. 2, the flexible substrate 20 includes a plurality of flexible conductive leads 28 formed on the first surface 22 of flexible substrate 20. The flexible conductive leads 28 may be made from a wide variety of conductive materials, including gold, aluminum, copper and their alloys. Each conductive lead 28 desirably includes a first end 30 that is permanently secured to the flexible substrate 20 and a second end 32 that is movable relative to first end 30 of lead 28. In certain preferred embodiments, the second ends 32 of the leads 28 are preferably releasably secured to and moveable away from the top surface 22 of flex...

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Abstract

A method of making a microelectronic package includes providing a substrate having a plurality of conductive leads at a first surface of the substrate. The conductive leads may have first ends permanently attached to the substrate and second ends remote from the terminal ends, the second ends being movable relative to the first ends of the leads. One or more microelectronic elements having contact bearing surfaces and back surfaces remote therefrom may be juxtaposed with the substrate and the contacts connected with the first ends of the leads. A substantially rigid plate may be attached to the back surfaces of the microelectronic elements. The substantially rigid plate may be moved to a precise height above the substrate to vertically extend the leads. While the plate is maintained at the precise height above the substrate, a spacer material is dispensed between the plate and the substrate. The spacer material is then at least partially cured for holding the plate at the precise height above the substrate.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]The present application claims benefit of U.S. Provisional Application Ser. No. 60 / 236,328, filed Sep. 29, 2000, the disclosure of which is hereby incorporated by reference herein.FIELD OF THE INVENTION[0002]The present invention relates to microelectronic packages having leads and specifically relates to methods of making microelectronic packages having arrays of vertically extended leads.BACKGROUND OF THE INVENTION[0003]Complex microelectronic devices such as semiconductor chips typically require numerous connections to other electronic components. For example, a complex device including a semiconductor chip may require hundreds of electrical connections between the chip and one or more external devices. These electrical connections may be made using several alternative methods, including wire bonding, tape automated bonding and flip-chip bonding. Each of these techniques presents various problems including difficulty in testing the chi...

Claims

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Application Information

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Patent Type & Authority Patents(United States)
IPC IPC(8): H05K13/04
CPCH05K13/046H01L2224/16225Y10T29/49146Y10T29/49169Y10T29/49147Y10T29/49144Y10T29/49149Y10T29/4913H01L2924/00014H01L2224/0401
Inventor BEROZ, MASUDWARNER, MICHAEL
Owner TESSERA INC