Multi-layer nonvolatile memory devices and methods of fabricating the same

a non-volatile memory and multi-layer technology, applied in the field of semiconductor devices, can solve problems such as the limit of the thickness of the semiconductor layer

Inactive Publication Date: 2008-05-08
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0013]Some embodiments of the present invention provide a multi-layer nonvolatile memory device where there is little

Problems solved by technology

However, there may be a limit in a thickness of a semiconductor layer compared to a thickness of a semiconductor substrate, and, therefore, a

Method used

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  • Multi-layer nonvolatile memory devices and methods of fabricating the same
  • Multi-layer nonvolatile memory devices and methods of fabricating the same
  • Multi-layer nonvolatile memory devices and methods of fabricating the same

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Embodiment Construction

[0027]The invention now will be described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Like reference numerals refer to like elements throughout the description of the figures.

[0028]It will be understood that when an element is referred to as being “on” another element, it can be directly on the other element or intervening elements may be present. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present. It will be understood that when an element is referred to as being “connected” or “coupled” to another element, it can be directly con...

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Abstract

A nonvolatile memory device includes a semiconductor substrate having a first well region of a first conductivity type, and at least one semiconductor layer formed on the semiconductor substrate. A first cell array is formed on the semiconductor substrate, and a second cell array formed on the semiconductor layer. The semiconductor layer includes a second well region of the first conductivity type having a doping concentration greater than a doping concentration of the first well region of the first conductivity type. As the doping concentration of the second well region is increased, a resistance difference may be reduced between the first and second well regions.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]This U.S. non-provisional patent application claims priority under 35 U.S.C. § 119 to Korean Patent Application No. 2006-103050, filed on Oct. 23, 2006, the entire contents of which are hereby incorporated by reference.BACKGROUND OF THE INVENTION[0002]The present invention disclosed herein relates to semiconductor devices and methods of fabricating the same, and, more particularly, to multi-layer nonvolatile memory devices and methods of fabricating the same.[0003]Semiconductor devices have, generally, reached the limit of reducing a horizontal size thereof, and, thus, a three-dimensional structure with a plurality of cell array layers stacked has been researched to overcome such a limit.[0004]To form a cell array layer in a multi-layer, a plurality of semiconductor layers may be formed on a semiconductor substrate. However, there may be a limit in a thickness of a semiconductor layer compared to a thickness of a semiconductor substrate, a...

Claims

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Application Information

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IPC IPC(8): H01L21/4763H01L21/3205
CPCH01L21/8221H01L27/0688H01L27/105H01L27/115H01L27/11551H01L27/11524H01L27/11526H01L27/11529H01L27/11521H10B41/40H10B41/41H10B69/00H10B41/20H10B41/30H10B41/35H01L29/40114
Inventor JANG, YOUNG-CHULKIM, KI-NAMJUNG, SOON-MOONJANG, JAE-HOON
Owner SAMSUNG ELECTRONICS CO LTD
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