Method for yield improvement of tmbs devices

Abstract

A method for yield improvement of trench MOS barrier Schottky (TMBS) devices includes: forming a plurality of trenches in a substrate; forming a gate dielectric layer over a surface of the substrate and inner surfaces of the trenches; forming gates in the trenches; forming a first barrier dielectric layer, a second barrier dielectric layer and an intermediate dielectric layer over the trenches; etching the intermediate dielectric layer with the second barrier dielectric layer serving as an etch stop layer to form a window for forming contact holes; etching a portion of the second barrier dielectric layer within the window using the first barrier dielectric layer as an etch stop layer; and etching in the window to remove a portion of the first barrier dielectric layer overlying the gates and a portion of the gate dielectric layer overlying the substrate.

Description

CROSS-REFERENCES TO RELATED APPLICATIONS[0001]This application claims the priority of Chinese patent application number 201410198290.5, filed on May 12, 2014, the entire contents of which are incorporated herein by reference.TECHNICAL FIELD[0002]The present invention relates generally to the fabrication of semiconductor devices, and more particularly to a method of yield improvement of trench MOS barrier Schottky (TMBS) devices.BACKGROUND[0003]Trench MOS barrier Schottky (TMBS) diodes, also known as metal-semiconductor diodes, are semiconductor devices that debuted in recent years. The TMBS devices feature a low power consumption, large current and ultra high speed. In a TMBS device, a metal is formed in contact with a semiconductor material so as to form a potential barrier (usually called surface barrier or Schottky barrier) at the interface of the metal and the semiconductor material. This potential barrier enables the TMBS device to function as a rectifier or detector. As minori...

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Benefits of technology

[0015]It is therefore an objective of the present invention to provide a method for yield improvement of TMBS devices which can address the above-described over-etching and residue problems and hence improve the yield of TMBS devices.

[0032]Compared with the conventional methods, the method of the present invention is mainly advantageous in that successively forming a first barrier dielectric layer, a second barrier dielectric layer and the intermediate dielectric layer over the formed gates allows the underlying gate dielectric layer to be protected by the first and second barrier dielectric layers from being damaged during the process for etching away the relatively thick intermediate dielectric layer, and in that as the first barrier dielectric layer is relatively thin, its formation is associated with a small thickness non-uniformity and it can greatly reduce the total etching time of the first and the second barrier dielectric layers, thus circumventing the problem of over-etching of the gate dielectric layer portions covering the trench sidewalls as well as the problem of the dielectric layer residue. Therefore, forming a relatively thin first barrier dielectric layer can mitigate the requirements on equipment performance, reduce damage to the gate dielectric layer portions covering the trench sidewalls, expand process window and result in yield improvement of TMBS devices.

Problems solved by technology

As minority charge carriers in Schottky diodes have a minimal charge storage effect, the frequency response of such devices is limited merely by their RC time constant.

Further, the intermediate dielectric layer 50 is required to be formed to a large thickness that is generally up to 10000 Å. However, due to equipment constraints, for such a large thickness, the intermediate dielectric layer 50 will originally have a certain thickness non-uniformity itself, 800 Å for each 10000 Å, introduced from its formation process.

On the other hand, the yield of the TMBS device will also be adversely affected when the etched amount is reduced to an insufficient extent which leads to a residue of the dielectric layer.

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