Data receiving device, a semiconductor apparatus, and a semiconductor system using the data receiving device

Abstract

A data receiving device includes a clock receiver and a plurality of data receivers. The clock receiver is configured to generate a plurality of internal clock signals from a clock signal and a complementary clock signal based on a switching enable signal. The plurality of data receivers are configured to receive data and a reference voltage and compare the data with the reference voltage in synchronization with the plurality of internal clock signals, respectively, to generate first internal data. Among the plurality of data receivers, a data receiver receiving an internal clock signal, of which a logic level transitions signals when a logic level of the switching enable signal transitions, is configured to change a voltage level of the reference voltage when the logic level of the switching enable signal transitions.

Description

CROSS-REFERENCES TO RELATED APPLICATION[0001]The present application claims priority under 35 U.S.C. § 119(a) to Korean application number 10-2020-0010948, filed on Jan. 30, 2020, in the Korean Intellectual Property Office, which is incorporated herein by reference in its entirety as set forth in full.BACKGROUND1. Technical Field[0002]Various embodiments relate to an integrated circuit technology and, more particularly, to a data receiving device and a semiconductor apparatus and a semiconductor system using the same.2. Related Art[0003]An electronic device includes many electronic elements, and a computer system includes many semiconductor apparatuses each including a semiconductor. Semiconductor apparatuses configuring a computer system may communicate with each other by receiving and transmitting data and a clock signal. The semiconductor apparatuses may operate in synchronization with a clock signal. The semiconductor apparatuses may output data in synchronization with a clock s...

AI Technical Summary

Benefits of technology

[0005]In an embodiment, a data receiving device may include a clock receiver, a first data receiver, and a second data receiver. The clock receiver may be configured to generate a first reception clock signal and a second reception clock signal from a clock signal and a complementary clock signal based on a switching enable signal. The clock receiver may be configured to change a logic level of the first reception clock signal when a logic level of the switching enable signal transitions. The first data receiver may be configured to compare data with a reference voltage in synchronization with the first reception clock signal to generate first internal data. The second data receiver may be configured to compare the data with the reference voltage in synchronization with the second reception clock signal to generate second internal data and may compensate for a voltage level change of the reference voltage based on the switching enable signal.

Problems solved by technology

As transistor-based semiconductor apparatus becomes miniaturized, the semiconductor apparatus may easily deteriorate.

BTI may raise a threshold voltage and thus may decrease an operation speed of a semiconductor apparatus and shorten the product life of the semiconductor apparatus.

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