Process for fabricating a heterostructure limiting the formation of defects

Abstract

The invention relates to a process for fabricating a heterostructure comprising at least one thin layer and a carrier substrate made of a semiconductor, the process comprising: bonding a first substrate made of a single-crystal first material, the first substrate comprising a superficial layer made of a polycrystalline second material, to a second substrate so that a bonding interface is created between the polycrystalline layer and the second substrate; removing from the free surface of one of the substrates, called the donor substrate, a thickness thereof so that only a thin layer is preserved; generating a layer of amorphous semiconductor material between the first substrate and the bonding interface by amorphization of the layer of polycrystalline material; and crystallizing the layer of amorphous semiconductor material, the newly crystallized layer having the same orientation as the adjacent first substrate.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This application is a national phase entry under 35 U.S.C. §371 of International Patent Application PCT / IB2012 / 002482, filed Nov. 21, 2012, designating the United States of America and published in English as International Patent Publication WO 2013 / 080010 A1 on Jun. 6, 2013, which claims the benefit under Article 8 of the Patent Cooperation Treaty and under 35 U.S.C. §119(e) to French Patent Application Serial No. 1161000, filed Nov. 30, 2011, the disclosure of each of which is hereby incorporated herein in its entirety by this reference.TECHNICAL FIELD[0002]Generally, the invention relates to the fabrication of heterostructures, i.e., structures obtained by joining elementary structures, especially used for microelectronic, optoelectronic, photovoltaic or micromechanical applications. The invention in particular relates to “semiconductor-on-insulator” structures, also called “SOI” structures.[0003]In this text, the term “insulating” is ...

AI Technical Summary

Problems solved by technology

However, current processes for fabricating heterostructures may cause a number of different types of defects.

Among these defects, blisters and voids are particularly problematic.

However, in the case of an ultrathin oxide layer, or when this layer is absent altogether, it is not possible for all the hydrogen gas molecules generated to be stored, and the excess accumulates at the bonding interface and generates defects.

Specifically, as soon as the temperature to which the bonded structure is subjected to exceeds 300° C., the hydrogen gas begins to exert pressure on defects present at the bonding interface, causing blisters to form.

The smaller the thickness of the BOX, to the point where there is no BOX, such as is the case for DSB heterostructures, for example, the more problematic this effect becomes.

In particular, the latest generation of SOI structures, called UTBOX (ultra-thin buried oxide) structures, in which the insulating layer is smaller than about 50 nm in thickness, exhibits a high defect density because the insulating oxide layer is not thick enough to contain all the gas freed during the process.

This solution, nevertheless, has the drawback that the implanted atoms disrupt the SOI structure.

This technique does not directly solve the problem of how to trap species generated during the fabrication process.

Furthermore, with this technique, the polysilicon may recrystallize with a large grain size during the heat treatment, thus affecting the uniformity and the functionality of the substrate.

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