A FIFO storage and method for rapidly generating storage mark

Abstract

The invention relates a method of designing memory and using the memory to fast generate memory flag in communication field. A first-in first-out (FIFO) memory is provided with a first counter to count cells stored in the memory to act as a flag of cell situation in the memory, and its characteristic: the FIFO memory is also provided with a second counter to act as a flag of idle memory cell situation in the memory, the FIFO memory provides a fast empty flag or full flag generating mechanism for message-element level FIFO according to the count values of the two counters and its characters: as starting the FIFO, updating the value of the corresponding counter and need not upgrade it until the access is completed. Therefore, the empty and full flags of the FIFO can be generated in advance without waiting for the cell operation to end, thus reducing the time interval between two accesses to the FIFO and increasing FIFO accessing efficiency.

Description

technical field [0001] The invention relates to the field of communication, in particular to the design of a first-in-first-out memory (FIFO) in the field of communication and a method for rapidly generating storage marks by using the memory. technical background [0002] The basic unit of data transmission in an ATM network is an ATM cell, which is a fixed-length data frame. In ATM equipment, the FIFO for storing ATM cells generally adopts a cell-level FIFO. The cell-level FIFO generally divides the internal memory of the FIFO logically into multiple storage blocks of the same size. One storage block can store one ATM cell. The empty flag and full flag output by the cell-level FIFO are all cells. Class. [0003] In the prior art solutions, the generation of cell-level FIFO empty flags and full flags is generally realized by designing a cell counter in the FIFO, and the count value of the cell counter indicates how many cells are stored in the FIFO. When the value of the ...

AI Technical Summary

Problems solved by technology

[0006] The purpose of the present invention is to provide a set of design schemes to solve the problem that the time delay of empty flags and full flags generated by cell-level FIFOs in the existing design schemes is relatively large, and can quickly generate empty flags and full flags, improving the access efficiency of FIFO

Images