Arithmetic operation unit, information processing apparatus and arithmetic operation method
A technology of information processing equipment and arithmetic operations, applied in the direction of electrical digital data processing, digital data processing components, calculations, etc., can solve the problem of increased delay, prevent the increase of delay, reduce hardware resources, and increase clock frequency Effect
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[0068] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.
[0069] [1] Embodiment of the present invention in the case of single-precision arithmetic
[0070] First, refer to figure 1 The shown block diagram depicts the structure of a floating-point multiply-adder according to an embodiment of the present invention. Incidentally, like reference numerals in the drawings designate like or corresponding components, and thus their detailed descriptions are partially omitted here.
[0071] Such as figure 1 As shown, the floating-point multiplication adder 1 includes a right shifter (rectifier) 10, a multiplier [CSA (carry-save adder) tree] 11, a CSA (carry-save adder) 12, an absolute value adder (Abs . adder) 13 , shift amount calculator [L.Z. (leading zero) predictor] 20 , normalizer (left shifter) 30 , rounder 40 and sticky bit generator 50 .
[0072] The floating-point multiply-adder 1 supports single-precisio...
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