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Method for current sense amplifier calibration in MRAM devices

A technology of random access memory and current detection, applied in static memory, digital memory information, information storage, etc.

Inactive Publication Date: 2009-12-09
INT BUSINESS MASCH CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] Unfortunately, a fundamental disadvantage of sense amplifiers as used in MRAM devices is the input offset current (or voltage) generated by individual device mismatches within the sense amplifier

Method used

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  • Method for current sense amplifier calibration in MRAM devices
  • Method for current sense amplifier calibration in MRAM devices
  • Method for current sense amplifier calibration in MRAM devices

Examples

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Embodiment Construction

[0015] first reference figure 1 , which shows a schematic diagram of an MRAM device 100 suitable for use in accordance with embodiments of the present invention. Specifically, figure 1 The device 100 is a 1-transistor, 1-MTJ (1T1MTJ) type MRAM device that generally includes a memory array circuit 102 , a column selector circuit 104 , and a current sense amplifier circuit 106 . The memory array 102 in turn includes a plurality of data cells 108, and one or more reference cells 110a, 110b. In the exemplary device, the first reference cell 110a stores a "1" state within its tunnel junction, while the second reference cell 110b stores a "0" state within its tunnel junction.

[0016] exist figure 1 , the column selector circuit 104 connects the normal bit line (BL) and the reference bit lines (refBL1, refBL0) to the input of the (current) sense amplifier circuit 106 by activation of a control signal designated "column select". During a cell detection operation, the sense amplif...

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Abstract

The present invention discloses a calibrated magnetic random access memory (MRAM) current sense amplifier comprising: a first plurality of trimming transistors selectively configured in parallel with a first load device connected to a sense amplifier associated with a data terminal; a second plurality of trimming transistors selectively configured in parallel with a second load device associated with a reference terminal of a sense amplifier; wherein said first and said second plurality The trim transistors are individually activated to compensate for device mismatch between the data and reference terminals of the sense amplifier.

Description

technical field [0001] The present invention generally relates to magnetic random access memory devices, and more particularly to a method and apparatus for calibrating current sense amplifiers in MRAM devices. Background technique [0002] Magnetic (or magnetoresistive) random access memory (MRAM) is a non-volatile random access memory technology that could potentially replace dynamic random access memory (DRAM) as the standard memory for computing devices. Using MRAM as non-volatile RAM will eventually enable "instant-on" systems that come to life as soon as they are switched on, saving e.g. traditional PCs from transferring boot data from the hard drive during system power-on The amount of time required to get to volatile DRAM. [0003] Magnetic memory elements (also referred to as tunneling magnetoresistive or TMR devices) include structures having ferromagnetic layers separated by nonmagnetic layers (barriers) and arranged as magnetic tunnel junctions (MTJs). Digital ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C29/00G11C7/06
CPCG11C29/026G11C11/16G11C29/028G11C29/02G11C2029/1204G11C7/062G11C7/067G11C11/1673G11C2207/063
Inventor 约翰·K.·迪布罗斯蒂尔特玛·古戈尔斯蒂凡·拉莫斯汉斯·维尔曼
Owner INT BUSINESS MASCH CORP
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