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Mixed signal integrated circuit

A technology of integrated circuits and circuits, applied in the direction of generating/distributing signals, electrical components, automatic power control, etc., can solve the problems of high cost of analog circuits, affect the design of analog circuits, and be difficult to implement, and achieve the effect of reducing the amount of interference

Inactive Publication Date: 2007-09-19
NXP BV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, these methods can significantly affect the design of analog circuits, making analog circuits actually more expensive and difficult to implement

Method used

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  • Mixed signal integrated circuit
  • Mixed signal integrated circuit
  • Mixed signal integrated circuit

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Embodiment Construction

[0029] The PLL clock buffer circuit shown in Figure 3 is based on the JEDEC standard specification for this circuit for registered DDR2 DIMM applications (JESD82-11), so its configuration and operation will not be described in detail here. Figure 4 shows a modified version of this circuit according to an embodiment of the invention.

[0030] In the known circuit in FIG. 3 , the SSM requires an external clock signal along input line 22 . In contrast, in the embodiment of the invention shown in FIG. 4, the SSM 20 is replaced by the input latch 29 and the ASM 30, and the clock signal is no longer required, thereby removing a significant source of interference accompanying the digital circuitry in the integrated circuit. .

[0031] The PLL clock buffer circuit distributes the differential clock input pair 24 to the ten differential clock output terminals Y0 to Y9 and their inverting terminals. These clock outputs are controlled by 4 input signals, the positive supply AV DD , "O...

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Abstract

This invention relates to mixed signal integrated circuits, that is, integrated circuits comprising both analogue and digital circuitry. More particularly, it concerns reduction of noise in such a device. When a digital circuit is included in the same integrated circuit device as an analogue circuit, the digital circuit may be an additional source of a considerable amount of noise. This results in cross-talk, electrical interference and signal distortion imposed on the analogue signals. The invention provides an integrated circuit comprising analogue circuitry (26) and digital circuitry (29, 30) wherein the digital circuitry includes an ASM (30). An ASM does not require a clock signal. Its operation is triggered by appropriate input conditions, but in contrast to an SSM it is idle when there in no change in its inputs, lowering the level of noise generated by the digital circuitry.

Description

technical field [0001] The present invention relates to a mixed signal integrated circuit, ie an integrated circuit comprising analog circuits and digital circuits. More specifically, the present invention relates to reducing noise in such devices. Background technique [0002] Mixed-signal integrated circuit devices are being used more and more widely. This is due to the fact that the manufacturing cost of such devices is relatively low compared to the manufacturing cost of separate analog and digital devices, and the device can embed higher performance analog functions in an economical digital manufacturing process. Such devices are used in a wide range of electronic applications, including consumer electronics equipment, computing equipment, medical equipment, and gaming systems. [0003] It is known that signal interference in mixed-signal devices mainly comes from noise generated by digital circuits. Noise can be defined as: unwanted, random and irrelevant signals th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F1/08
CPCH03L7/06
Inventor 阿姆里塔·德什潘德贝内迪克特·米卡
Owner NXP BV