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Expansion technology for non-linear clock and data recovery circuit dynamic capturing and tracing range

A data and dynamic phase technology, applied in the electronic field, can solve the problems of sensitivity to frequency change, limited data tolerance, wrong phase locking, etc., to achieve the effect of improving the tracking accuracy and expanding the capture and tracking range

Active Publication Date: 2010-11-03
江苏纹芯微电子有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the disadvantage of the method described in patent 20060256909 is that its data phase-locked loop has a small capture and tracking range, is sensitive to frequency changes, and thus has limited tolerance to data instability (such as jitter)
Secondly, the data selection for double-frequency sampling is a static selection, which cannot guarantee the best selection point when the data rate is high, and even leads to wrong phase locking, which increases the bit error

Method used

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  • Expansion technology for non-linear clock and data recovery circuit dynamic capturing and tracing range
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  • Expansion technology for non-linear clock and data recovery circuit dynamic capturing and tracing range

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Embodiment Construction

[0024] After switching from the frequency loop to the data loop, the data loop starts to lock the data flow. figure 1 Among them, Φ[11:0] is the multi-phase clock; Vctrl is the control voltage; DS[11:0] is the sampled version; Last_dir is the phase state of the previous sampling period; Lctrl is the loop control signal. figure 2 Shown is one of the core circuits of the present invention, the dynamic phase detection circuit. The data stream is first clocked by different phase clocks (Φ[11:0], see Figure 6 ) sampled. The sample DS[11:0] is passed to the phase decision circuit to generate a logic level inversion (that is, from 0 to 1, or from 1 to 0) flag signal (T[11:0]), and the serial numbers of these signals are Indicates where logical transformations take place. For example, when T[0]=1, it means that the transition occurs between Φ[0] and Φ[1], and when T[1]=0, it means that the transition occurs between Φ[1] and Φ[2] No signal transitions occur between them. In the...

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Abstract

The present invention adopts technology of non-linearity clock and data recovery circuit dynamic capturing and trace range spreading. The aim of decreasing phase difference is finally reached based on phase difference between collecting data and VCO clock producing corresponding advanced or lagging pulse through current pump adjusting VCO phase. Collection of phase difference is fully decided by switching test of signal logic level, dynamic phase decision circuit can produce response pulse that changes VCO phase to break away blind zone and rapidity lock in normal locking situation, even if dynamic phase decision circuit fall into blind zone with any reason, this can not make VCO setting drift, so losing lock can be avoided effectually. The present invention extends capturing and tracing range of loop circuit greatly, and improves reliability of recovery data. Accordingly, the present invention can reduce the demand of frequency locking circuit, improve reliability of recovery data and reduces error rate effectually especially in high ratio transmitting process.

Description

technical field [0001] The invention relates to electronic technology, in particular to a technology for expanding the dynamic capture and tracking range of a nonlinear clock and data recovery circuit (Bang-Bang Type CDR with Dynamic Tracking Range Expansion). Background technique [0002] Serial data transmission becomes the trend of high-speed data transmission. With the continuous improvement of the data rate, the requirements for system bandwidth and receiving accuracy are also getting higher and higher. It is the core technology of serial data transmission to recover the data correctly from the serial data stream. Two common data recovery methods are frequency multiplication sampling and data tracking using phase-locked loop technology to recover the clock. Double-frequency sampling is to use the information it collects to determine the most likely data through digital phase-locking technology. This is what is described in US Patent No. 5,905,769. This method is sim...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L7/033H03L7/085
Inventor 丁勇
Owner 江苏纹芯微电子有限公司