Method and apparatus for generating non-binary balanced codes
An encoder and decoder technology, applied in the field of data encoding
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[0067] The following description is merely exemplary in nature and is in no way intended to limit the invention, its application or uses. For purposes of clarity, the same reference numbers will be used in the drawings to identify similar elements. As used herein, the terms "module," "circuit," and / or "device" refer to an application-specific integrated circuit (ASIC), electronic circuit, processor (shared, dedicated, or processors) and memory, combinational logic, and / or other suitable components that provide the described functionality. As used herein, the phrase "at least one of A, B, and C" should be construed to mean a logical (A or B or C) using a non-exclusive logical or. It should be understood that steps within a method may be executed in different order without altering the principles of the present invention.
[0068] Referring now to FIG. 1A , an exemplary encoder 100 is shown. An input signal including various symbols is provided to the encoder 100 . Encoder 1...
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