Storage system
A memory system and storage unit technology, applied in static memory, digital memory information, information storage, etc., can solve the problems of potential writing into storage unit 110, insufficient stability of storage unit 110, etc.
Active Publication Date: 2012-04-04
VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
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Problems solved by technology
[0006] Since the memory 100 is limited to only one bit line, when the storage unit 110 has stored data 1 (that is, the node B is at a high potential), the storage unit 110 cannot write the correct potential into the storage unit 110 when the high potential is written again. , the traditional method is to adjust the beta ratio of the transistor 102, 103, 104 or 105, however, the above method will cause insufficient stability of the storage unit 110, the present invention is to solve the problem of rewriting the high potential of the above storage unit 110
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[0031] In order to make the above and other objects, features, and advantages of the present invention more comprehensible, the preferred embodiments are specifically listed below, together with the accompanying drawings, and are described in detail as follows:
[0032] Since the memory 100 is limited to only one bit line, when the memory unit 110 has already stored data 1 (that is, the node B is at a high potential), a write error will occur when the memory unit 110 is written to a high potential again. The potential difference between the source and drain of the NMOS transistor is V TN , when the memory cell 110 is written to a high potential again, the potential of the bit line is V dd , the potential of node B is V dd -V TN , so the NMOS transistor 103 cannot be fully turned on, and the NMOS transistor 102 is not turned off enough, so the memory 100 cannot store the correct potential at the nodes B and C, and when the memory cell 110 is rewritten with a high potential, r...
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The invention relates to a storage system which comprises at least one storage unit and a source electrode power supply driving circuit. Each storage unit is coupled between a source electrode voltageand a ground voltage and stores a digital datum according to a word line signal and a bit line signal. The source electrode power supply driving circuit provides the source electrode voltage for thestorage unit, when the storage unit is in a read state, the source electrode voltage is a first power supply voltage, and when the storage unit is in a write state, the source electrode voltage is a second power supply voltage, wherein the second power supply voltage is that the first power supply voltage reduces a given voltage so as to prevent the storage unit from writing error when rewriting the digital datum.
Description
technical field [0001] The present invention relates to a memory cell having a single bit line, and more particularly to a memory cell receiving a variable voltage source to avoid data writing errors. Background technique [0002] figure 1 is a conventional five-transistor static random access memory (Static Random Access Memory, SRAM) 100 . The switch 101 is an NMOS transistor. The NMOS transistor 101 is turned on or off according to the word line signal WL to transmit the bit line signal BL to the storage unit 110. The storage unit 110 is a latch circuit with two inverters cross-coupled. Composed, the first inverter includes an NMOS transistor 102 and a PMOS transistor 104, the second inverter includes an NMOS transistor 103 and a PMOS transistor 105, and nodes B and C are mutually inverting to store digital data. [0003] When the memory 100 writes data 1, the potential of the bit line signal BL will be pulled to the potential V dd , the word line signal WL turns on th...
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IPC IPC(8): G11C11/413
Inventor 陈瑞隆钟毅勋张家铨陈伟松
Owner VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION