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A high power integrated RF amplifier
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A technology of amplifiers and capacitors, applied in the field of integrated RF amplifier structures, can solve problems such as limiting the maximum output power of equipment
Inactive Publication Date: 2012-09-26
AMPLEON NETHERLANDS
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This limits the maximum output power of the device and also limits the transfer of heat caused by the power dissipated on the active area of the device
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[0039] FIG. 1 shows a circuit diagram of a unit of the prior art RF amplifier of FIG. 2 . The base unit has: an input for receiving an input signal IS; and an output for providing an output signal OS. FET F1 has: a gate G connected to the input through a series arrangement of two inductors Lg1 and Lg2 of the pre-matching circuit PRMC; a drain D connected to the output through an inductor Ld; and a source S connected to to a reference level, which is, for example, ground. The post-matching circuit POMC is connected between the drain D and the reference level. The pre-matching circuit PRMC also includes a capacitor Cp connected between the junction of the inductors Lg1 and Lg2 and the reference level. The post-matching circuit POMC comprises: a series arrangement of an inductor Lpo and a capacitor Cpo. The pre-matching circuit and the post-matching circuit optimally match the input and output impedance of the basic amplifier unit. Multiple such units are arranged in parallel...
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Abstract
An integrated HF-amplifier structure comprises in a first direction (FD) in the order mentioned: an input bond pad (IBP), a plurality of cells (CE1, CE2) being displaced with respect to each other in the first direction (FD), and an output bond pad (OBP). Each one of the cells (CE1, CE2) comprises an amplifier having an input pad (GP1, GP2), an active area (A1, A2), and an output pad (DP1, DP2). The active area (A1, A2) is arranged in- between the input pad (GP1, GP2) and the output pad (DP1, DP2), and the input pad (GP1, GP2), the active area (A1, A2), and the output pad (DP1, DP2) are displaced with respect to each other in a second direction (SD) substantially perpendicular to the first direction (FD). A first network (Nl) comprises first interconnecting means (Li, Ci; Li1, Li2, Ci1) to interconnect input pads (GP1, GP2) of adjacent ones of the plurality of cells (CE1, CE2), and extends in the first direction (FD). A second network (N2) comprises second interconnecting means (Lo, Co; Lo1, Lo2, Co1) to interconnect output pads (DPI, DP2) of adjacent ones of the plurality of cells (CE1, CE2), and extends in the first direction (FD). The first network (Nl) and the second network (N2) are constructed for obtaining an output signal (OS) at the output bond pad (OBP) having for all the interconnected cells (CE1, CE2) an equal phase shift and amplitude for a same input signal (IS) at the input bond pad (IBP). At particular bias and phase shift conditions the structure provides a Doherty amplifier with improvement of efficiency at power back off.
Description
technical field [0001] The present invention relates to an integrated RF amplifier structure and an integrated circuit including such an integrated amplifier structure. Background technique [0002] In wireless communications, especially in base stations, very high power RF amplifiers are required. Recent integrated RF power amplifiers are capable of output peak powers as high as 180W, but this is still not enough. For example, these RF amplifiers are used in 3G wireless communication or W-CDMA. Figure 2 shows a typical example of a modern design RF amplifier in a SOT 502 package and Figure 1 shows the corresponding electrical schematic for a basic amplifier unit. The active dies are placed in rows between the pre-termination and post-termination circuits. The die consists of multiple basic amplifier units driven in parallel. An aligned row arrangement of dies is necessary because the delay time from input to output should be the same for all amplifier units. In particu...
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