Clock synchronization method and device based on packet switching

Abstract

The invention discloses a clock synchronization method based on packet switching, comprising the following steps of: collecting time stamps for calibrating clocks and respectively calculating a receiving and transmitting time stamp difference corresponding to the same clock calibrating information; selecting the lower bound and the upper bound of time deviation from the obtained receiving and transmitting time stamp difference, respectively calculating the occupied weights of the lower bound and the upper bound in the time deviation, and then calculating the time deviation through the lower bound, the upper bound and the respective weights thereof; and calibrating a slave clock by utilizing the time deviation. Correspondingly, the invention also provides a clock synchronization device based on packet switching, comprising a slave clock which comprises a time stamp collecting module, a time stamp difference calculating module, a time deviation calculating module and a clock calibrating module. By adopting the method and the device, the time deviation between the main clock and the slave clock can be accurately calculated and the calculation error of the time deviation can be reduced.

Description

technical field [0001] The invention relates to the field of time synchronization, in particular to a clock synchronization method and device based on packet switching. Background technique [0002] In the Worldwide Interoperability for Microwave Access (WiMAX) system, the Time Division Duplex (TDD) mode is used, and the combination of Time Division Multiple Access (TDMA) and Frequency Division Multiple Access (FDMA) is used in the uplink, that is to say , each client only sends data within the time slot allocated to it. If the time when the client starts sending data is behind the actual time, that is, the one second assigned to the client is shorter than the actual time, then the timing The data will lose its accuracy, and the client will send data in advance. As the error increases, the client may send data in the time slot belonging to other clients, resulting in conflicts. Therefore, in view of the above problems, a method capable of accurately synchronizing clocks is ...

AI Technical Summary

Problems solved by technology

In other words, if the probability distribution of the assumed random path delay differs greatly from the actual path delay, the reliability of the estimated time deviation and frequency deviation parameters will be greatly affected

Therefore, in the case where the probability distribution of the random path delay matches the actual path delay to a low degree, the estimation of the time offset by the prior art is not reliable, and sometimes the error is large, so it is difficult to accurately synchronize the master-slave clocks

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