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Clock regeneration method taking standard clock/data as reference

A standard clock and clock technology, applied in the field of communication, can solve the problems of high duty cycle requirements of the reference clock, poor phase accuracy of the regenerated clock, etc., to achieve high phase accuracy and ensure correctness

Active Publication Date: 2013-05-22
CHONGQING JINMEI COMM
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AI Technical Summary

Problems solved by technology

[0007] In order to solve the problems existing in the prior art that the duty ratio of the reference clock (data) is high, the relative phase of the regenerated clock and the input reference changes with the frequency offset, and the phase accuracy of the regenerated clock is poor, the present invention proposes a method based on Clock / data as a reference clock regeneration method, the regeneration clock is generated by the local high-speed processing clock, the expected phase is set for the regeneration clock (the expected phase refers to the relative phase between the reference input and the regeneration clock), and the current phase of the regeneration clock is compared with the expectation The error phase between the phases is tracked and compensated, and the regenerated clock output by the local high-speed processing clock is constantly adjusted according to the compensation result

Method used

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  • Clock regeneration method taking standard clock/data as reference
  • Clock regeneration method taking standard clock/data as reference
  • Clock regeneration method taking standard clock/data as reference

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Embodiment Construction

[0036] see figure 1 , the solution of the present invention is: generate a regenerated clock from a local high-speed processing clock, set an expected phase for the regenerated clock, track and compensate the error phase between the current phase and the expected phase of the regenerated clock, and constantly adjust the local The phase of the regenerated clock output from the high-speed processing clock. The specific steps are:

[0037] 1) Set the desired phase θ set , 2) Determine the reference clock / data phase reference point, extract the current phase corresponding to the regenerative clock at the phase reference point (that is, extract the current phase of the regenerative clock corresponding to the phase reference point), and calculate the expected phase θ set The error phase θ from the current phase e (i), 3) for the error phase θ e (i) sequentially perform loop gain processing, cumulative phase processing and phase accumulator processing, 4) according to the quadra...

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Abstract

The invention discloses a clock regeneration method taking a standard clock / data as reference, which comprises the following steps of: generating a regeneration clock by a local high-speed processing clock, setting an expected phase for the regeneration clock, tracking and compensating the error phase between the current phase and the expected phase for the regeneration clock, and continually adjusting the phase of the regeneration clock output by the local high-speed processing clock according to the compensating result. The invention has the advantages of providing a new clock regeneration method, solving the problem that clock regeneration cannot be performed due to non-uniform duty ratio of reference signals, strictly ensuring a phase relationship between the reference input and the regeneration clock without relating with relative frequency deviation, ensuring the accuracy of the regenerative data and the reliability of link transmission and setting the relative phases of the regeneration clock and the input reference.

Description

technical field [0001] The invention relates to a communication technology, in particular to a clock regeneration method with clock / data as a reference. Background technique [0002] In the field of communication, some interfaces only transmit data signals, and interfaces do not include clock signals, such as HDB3 codes, clock information is transmitted through data; some interfaces transmit data signals and clock signals at the same time, such as B interface, clock information is directly transmitted through clock signals Transmission; on various interfaces, the data often has a certain amount of jitter when it is interfered by external signals, and the interface circuit needs to be processed by an analog circuit, which will cause the duty cycle of the reference signal to be uneven, so it is necessary to perform clock regeneration on the interface circuit. For data recovery and subsequent processing. [0003] Therefore, the goal of clock regeneration is to use the referenc...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L7/033
Inventor 陶小鱼唐铃万毅
Owner CHONGQING JINMEI COMM
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