71results about How to "Improve Phase Accuracy" patented technology

A quadrature signal generator receives a differential input signal and generates quadrature output signals that are 90 degrees out-of-phase with each other. The quadrature generator includes a coarse stage and a plurality of refinement stages. The coarse stage generates quadrature signals that may have some phase error, and the refinement stages process the quadrature signals to reduce any phase error. The refinement stages receive quadrature signals from the output of the coarse stage, and processes the quadrature signals to reduce the phase errors. The coarse stage and the refinement stages are configured using delay circuits that can be implemented with inverter circuits, such as, for example, CMOS inverter circuits. In the refinement stages, corresponding outputs of the delay stages are averaged together to reduce the quadrature phase error.

The invention discloses a structured light illuminating microscopic imaging system based on an integrated photonic chip. The structured light illuminating microscopic imaging system comprises a light source, the integrated photonic chip, a sample containing table, a microobjective, a filter part, a photoelectric detector, a computer processing system and a control system. The light source is connected with the integrated photonic chip, the integrated photonic chip is arranged below the sample containing table, the microobjective is arranged above the sample containing table, the filter part is arranged above the microobjective, and the photoelectric detector is arranged above the filter part. A sample to be detected is fixed to the sample containing table, and light emitted by the light source irradiates the sample to be detected on the sample containing table after being processed by the integrated photonic chip. The computer processing system is connected with the sample containing table, the photoelectric detector and the control system. The integrated photonic chip is connected with the control system. According to the technical scheme, the system has the advantages of being small in size, compact in structure, high in system stability, high in solar energy utilization rate, high in imaging resolution ratio and the like, and is suitable for the real-time three-dimensional imaging study of living cells.

The invention relates to a dual wavelength regression analysis-based optical fiber vibration sensor phase demodulation device, which is characterized by comprising a first narrowband laser, a second narrowband laser, a taper wavelength division multiplexer, a coupler, a digitally-controlled dimming delay line, an annular piezoelectric ceramic tube, a three-third coupler, a first taper wavelength division demultiplexer, a second taper wavelength division demultiplexer, a third taper wavelength division demultiplexer and a multi-channel data acquisition card, wherein the outer circle of the annular piezoelectric ceramic tube is uniformly wound with the vibration sensing optical fiber; and the annular piezoelectric ceramic tube can be telescopic periodically under driving of control signals.A dual-wavelength Mach-Zehnder interferometer and a three-third coupler digital phase demodulation technique are used, a dual wavelength regression analysis phase unwrapping principle is adopted, thepi phase limitation principle in the traditional phase unwrapping can be overcome in principle, instantaneous large-scale phase changes caused by actual strong vibration signals are tracked precisely,and a good and single-wavelength interferometry-consistent signal-to-noise ratio level is achieved.

The invention belongs to the technical field of intelligent detection for power systems and relates to an intelligent detection system for a transformer station computer monitoring system. The intelligent detection system comprises an upper computer, a measurement and control device and an intelligent detection device, wherein the intelligent detection device comprises a power module, a network interface, a singlechip, a digital signal processor (DSP), a field programmable gate array (FPGA), a digital/analog (D/A) converter, a synchronization module, a switching value input interface, a switching value output interface, a liquid crystal display (LCD) and input equipment; the intelligent detection device is connected with the upper computer through the network interface; the measurement and control device is connected with the intelligent detection device through the power module; the measurement and control device is connected with the upper computer, the switching value input interface and the switching value output interface respectively; and the network interface, the singlechip, the DSP, the FPGA, the D/A converter and the power module are connected with one another sequentially. The intelligent detection system has the characteristics of high phase precision, short response time and the like, and can meet a test requirement of the relevant national standard on the detection for the transformer station computer monitoring system.

The invention provides a double-frequency inusoidal grating absolute phase unwrapping method based on the integral linear programming search method. The method is characterized in that the integer linear programming method related to relative phase and fringe order is proposed according to the traditional double-frequency unwrapping principle, and the corresponding target functions and limiting conditions are created accordingly; a deformed inusoidal grating image is used as the calculating object to processing by ergodic searching by the method above, thus the integer pair of the fringe order can be quickly and accurately found out, and as a result, the purpose of unwrapping can be reached. According to the method, no requirement is proposed for the proportional relation between high frequency and low frequency, thus the applicable scope of the method is expanded; the order of priority is not proposed, so that the high-frequency and low-frequency unwrapping can be performed at the same time, and as a result, the operability of the method is improved; any intermediate over-capacity is not introduced and the sub-intervals are not divided, and therefore, the calculation process is simplified, the calculation amount is greatly decreased, and the operation efficiency is raised.

A method and device for generating a clock signal with predetermined clock signal properties firstly prepare a number of clock signals with an essentially identical frequency and with a respectively different phase relation with regard to a master clock signal in order to subsequently (on the basis of a control signal, which is prepared according to the clock signal to be generated), select predetermined clock signals from the number of prepared clock signals and to combine the selected clock signals in order to generate the desired clock signal.

The invention discloses a seven-bit high-precision broadband active phase shifter for a radio frequency/millimeter wave frequency band, which is characterized in that a single-ended signal output by apreceding-stage circuit is converted into a differential signal through a single-ended to differential passive balun, and four paths of I/Q orthogonal signals are generated through a second-order multiphase filter of an RC orthogonal network; providing gain for the generated four paths of I/Q orthogonal signals through the corresponding Gilbert units and realizing vector synthesis of the orthogonal signals; the synthesized signal is converted into a single-ended signal through the active balun, and the single-ended signal is amplified and output through the phase fine adjustment VGA; a vectorsynthesis quadrant is selected through a quadrant selection switch by adopting high two bits of a seven-bit digital control code, vector synthesis is realized by controlling the current magnitudes oftwo Gilbert units through a numerical control current array in the middle four bits, and phase fine adjustment is realized by controlling a switched capacitor in a VGA at the lowest bit. The invention has the advantages of simple circuit, low power consumption and small area, and can meet the beam scanning requirement of the phased array system.

A system clock recover device comprises a PCR value extracting module, a loading control module, a dichotomy frequency capturing module, a PID frequency tracing module, a local PCR generating module and a DA frequency control word outputting module, and detecting a reference PCR value of the system clock from a TS flow and sending to the dichotomy frequency capturing module, simultaneity loading the control module and ensconcing the PCR value which is extracted from the PCR value extracting module into the local generating module, wherein the dichotomy frequency capturing module rapidly captures frequency points of the system clock according to the PCR of the TS flow and the local PCR value, and the frequency points are traced by the PID frequency tracing module, wherein the PID frequency tracing module adopts a PID algorithm by using the PCR value of the TS flow and the local PCR, the DA frequency control word outputting module outputs a control voltage according to the obtained frequency control words, a voltage control crystal outputs local clock frequency according to the outputting voltage of the DA frequency control word outputting module and sends to the local PCR generating module. The invention has the advantages of rapid frequency capturing and high phase accuracy.

The invention provides a double beam integrated feed network, wherein amplitude phase error of the feed network is easy to control and the feed network is small in debugging workload, high in reliability and low in cost. The technical scheme includes that 12 routes of input signals of E1, E2...E12 are equally divided into two routes of signals through 12 2-equal power dividers. One route composes E gamma 1 through a 12-unequal power divider circuit board (1), and after phase delay is carried out, composition is carried out on the other route of the signals through a 12-unequal power divider circuit board (2), and each delay phase is composed to E gamma 2 in sequence. Physical vertical connection structures among the 12-unequal power divider circuit board (1), the 12-unequal power divider circuit board (2), the twelve 2-equal power dividers (3) and two output adaptors (4) is achieved by adopting a coaxial cable and micro-strip translation method, the 12-unequal power divider circuit board (1), the 12-unequal power divider circuit board (2), the twelve 2-equal power dividers (3) and the two output adaptors (4) are all integrated inside a feed network case seat (6).

The invention belongs to the field of artificial intelligence of optical measurement, and particularly relates to a real-time single-frame phase extraction method. The method specifically comprises the steps of: 1) establishing a deep convolutional generative adversarial network, and determining a trained loss function; 2) establishing a fringe projection measurement system; 3) collecting a training data set; 4) calculating a phase truth value of a collected deformation fringe pattern; 5) training the network with the loss function and data set in the above-mentioned steps; and 6) conducting real-time single-frame phase extraction. The method provided by the invention mainly utilizes the generative adversarial network, adopts the deformation fringe pattern as the input, generates a corresponding phase diagram, and solves the problem that the existing single-frame phase extraction method is poor in phase extraction precision for low-frequency fringes and abrupt-change curved surfaces.

The invention discloses a single-frame stripe analysis method based on a multi-scale generative adversarial neural network. The method comprises the following steps: constructing a multi-scale generative adversarial neural network model; constructing a comprehensive loss function L of the multi-scale generative adversarial neural network model; collecting training data of the multi-scale generative adversarial neural network, and training the multi-scale generative adversarial neural network by using the training data; and inputting a to-be-measured stripe image into the trained multi-scale image generator to obtain a corresponding sine term, cosine term and modulation degree graph, and calculating a phase by using an arc tangent function. After the neural network is trained, complex calculation parameters do not need to be manually set in the calculation process, and operation is easier and more convenient. Due to the fact that the input of the neural network is a single stripe image,an efficient and high-precision phase calculation method is provided for stripe analysis of a moving object.

The present invention relates to communication technologies and provides a method and a device for FSK/GFSK demodulation, the method comprises: determining a digital information vector group {V_l(i)} of a codeword a[k] to be demodulated and a corresponding phase matching vector group {θ_i(i)] within the duration of (2M+1)T; determining a received phase vector {tilde over (φ)}(i) of a received FSK/GFSK baseband signal φ(t, a); determining an average phase difference β_l between {tilde over (φ)}(i) and θ_l(i); calculating the phase matching degree Q_l between {tilde over (φ)}(i) and θ_l(i) after removing the impact of the average phase difference β_l, and determining an l value corresponding to the phase matching degree Q_l being the maximum; and determining the a[k], corresponding to the l value, in the digital information vector V_i(i) as a demodulation result. Because the impact of the average phase difference is removed during phase matching, the accuracy of phase matching is increased, and the performance of the phase domain demodulation technology is improved.

According to one embodiment of the invention, a method of increasing a phase resolution of an array antenna, comprises providing an array antenna having a plurality of rows of antenna elements, each antenna element having a first phase resolution; for at least one row of the array antenna, positioning each of the antenna elements to one of first and second phases, the first and second phases separated by at least the first phase resolution; for the at least one row of the array antenna, a number of antenna elements positioned to the first phase is the product of a number of antenna elements in the at least one row of the array antenna and a desired row phase angle divided by the first phase resolution; and for the at least one row of the array antenna, a number of antenna elements positioned to the second phase is the number of elements in the at least one row of the array antenna minus the number of antenna elements in the at least one row positioned to the first phase.

A synthesizer comprises a two-point modulation phase locked tow, TPM PLL, circuit configured to receive a frequency tuning signal and to generate a stepped chirp signal in an intermediate frequency range by applying a two-point modulation PLL on the frequency tuning signal, and a subsampling PLL circuit configured to receive the stepped chirp signal in a mm-wave frequency range and to generate a smoothened chirp signal in a mm-wave frequency range by applying a subsampling PLL on the stepped chirp signal.

An ECU executes a program including the steps of: detecting engine speed NE (S100); and stopping power supply to an electric motor of an intake VVT mechanism (S104), if engine speed NE is equal to or lower than a threshold value NE (0) (YES at S102).

A phase difference AF processing unit (19) connects detection signals of phase difference detection pixels (52A) in an AF area (53), connects detection signals of phase difference detection pixels (52B) in the AF area (53), and performs a correlation operation with respect to detection signal groups after connection to generate a defocus amount when it is determined that a subject image formed in the AF area (53) includes a high frequency component. The phase difference AF processing unit (19) performs a correlation operation with respect to detection signal groups of phase difference detection pixels (52A, 52B) in each pair line in the AF area (53) to generate the defocus amount when it is determined that the subject image formed in the AF area (53) does not include a high frequency component.

The invention discloses a compact waveguide power divider which comprises an input end 1, a transitional section 2, and at least two input ends 3. By controlling the width of the output end 3 and the thickness of a wall between each two adjacent output ends 3, and enabling the width and the thickness to be satisfied with a certain proportional relation, the input power can be well distributed into two ways to ten ways according to arbitrary power distribution ratio in waveguide full bandwidth. The compact waveguide power divider can be widely applied to military and civil fields of antenna array, phased array radar and power synthesis, missile guidance, communication and the like.

The invention discloses a high-precision frequency domain stability measuring device and method. The high-precision frequency domain stability measuring device comprises a frequency switching module, a reference source module, a phase comparing module, a high-resolution counting module, a central processing unit and a frequency dividing module, wherein the frequency switching module comprises a secondary processing module and is used for converting measured time domain signals into standard 1 KHz first frequency signals and transmitting the standard 1 KHz first frequency signals to the secondary processing module and the high-resolution counting module when the reference source module serves as a time base; the secondary processing module is used for processing the first frequency signals and outputting 100 Hz second frequency signals to the phase comparing module; the frequency dividing module is used for performing frequency division on the signal frequency of the reference source module and outputting sampling time signals to the phase comparing module.