Partition method for speculative failure thread

Abstract

The invention discloses a partition method for a speculative failure thread. The partition method comprises the following specific steps of: A, detecting the speculative failure thread; B, describing the determined speculative failure thread; C, describing a restarting range of the determined speculative failure thread; D, calculating a distance and a maximum distance of each failure parameter according to the description of the speculative failure thread and the description of the restarting range of the speculative failure thread, and taking the maximum distance in the distances as a partition reference N of the speculative failure thread; E, partitioning the speculative failure thread according to the distances and the maximum distances obtained in the step D, and combining the small threads so as to meet the requirement that the volume of the new thread is close to the partition reference N; and F, finishing the partitioning of the speculative failure thread. By the method, the data relativity among the threads can be eliminated, the control expense of the threads is reduced, and the resource consumption and the time consumption of thread restarting are reduced.

Description

technical field [0001] The invention relates to a method for dividing forward-looking failure threads, which belongs to the technical field of computers. Background technique [0002] At present, it is difficult for high-performance processors to significantly improve their performance only by increasing the main frequency of the processor and complex instruction pipeline technology, and doing so will also cause difficult problems such as high power consumption and heat dissipation. Therefore, single-chip multi-core processors (Chip Multi -Processors, CMP) technology has become one of the key technologies to improve processor performance. Although CMP technology has a good effect on parallel execution of multithreading, most of the programs are still serial programs. How to apply these serial programs to the CMP platform and make them run efficiently has always hindered high-end The evolution of performance computing. [0003] Parallel technology based on Thread-Level S...

AI Technical Summary

Problems solved by technology

[0002] At present, it is difficult for high-performance processors to improve their performance significantly only by increasing the main frequency of the processor and complex instruction pipeline technology, and this will also cause difficult problems such as high power consumption and heat dissipation. Therefore, single-chip multi-core processors (Chip Multi-core processors) -Processors, CMP) technology has become one of the key technologies to improve processor performance

Although CMP technology has a good effect on parallel execution of multi-threads, most programs are still serial programs. How to apply these serial programs to the CMP platform and make them run efficiently has always hindered high-end The evolution of performance computing

However, the results inferred by the forward-looking technology may not always be correct, which means that some threads will inevitably fail to look forward, and the restart of the look-ahead invalid thread may cause a huge resource overhead

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