31 results about "Adaptive routing algorithm" patented technology

The invention discloses a distributed node self-adaptive routing algorithm for an LEO satellite network. The technical characteristics are that the algorithm includes the following steps: a latticed LEO satellite communication system similar to an Iridium constellation is constructed; according to an interstar link design in a longitude and latitude direction, each satellite node is independently responsible for forwarding datagrams in a queue through a netted topological structure of a satellite constellation; and through increases and transmission of additional network state information in the datagrams, the satellite nodes sense and predict network states in different routing directions, and then the datagrams are guided to select forwarding links. The distributed node self-adaptive routing algorithm is reasonable in design. The determined self-adaptive routing mechanism balances traffic to prevent congestion through a load balancing means, and is applied to a low earth orbit Iridium-like constellation satellite network system. The network performance index of the algorithm is better than network performance indexes of other conventional algorithms. Particularly in a condition that a few routing hops is increased, the network load balancing degree is substantially increased, and the performance of the algorithm is more excellent than the conventional algorithms.

An apparatus is invented for implementing adaptive routing in packet switched networks. The hardware structure of the apparatus is based on the AntNet, which is an adaptive routing algorithm for selecting an optimized network route using a mobile agent that simulates an ant. The AntNet-based hardware structure can be applied to a system-on-chip system. The original AntNet algorithm is adapted for hardware implementation. Performance of the modified algorithm of the invention was verified by comparing the modified algorithm with the original AntNet algorithm in a virtual network structure. The hardware structure of the invention is effective for AntNet-based routing.

The invention provides a satellite DTN network unpredictable interrupt elastic routing algorithm algorithm based on spatiotemporal graph model, which is applied to the spatial information network, theparameters of the satellite network and the mathematical models of the spatio-temporal graph model construction algorithm and routing algorithm are given, and the capacity and energy cost of the inter-satellite links in the satellite network are calculated, which provides a practical and feasible scheme for the data transmission problem of the satellite network in the event of unpredictable interruption. Through a specific algorithm generation example, the algorithm proposed by the invention is proved to be effective. The unpredictable interrupt elastic routing algorithm of the invention cansolve the problem that after the unpredictable interrupt occurs in the satellite network, the normal transmission of the data is guaranteed and the energy expenditure thereof is minimized; and the unpredictable interrupt elastic routing algorithm of the invention can solve the problem that the unpredictable interrupt occurs in the satellite network and the normal transmission of the data is guaranteed and the energy expenditure thereof is minimized. Therefore, compared with other traditional routing algorithms, the elastic routing algorithm designed by the invention can effectively solve the problem of unpredictable interruption in the satellite network.

The invention discloses a router power model on the basis of a network-on-chip, which simplifies router operations into four power dissipation links namely write-cache, read-cache, a bestride switch and a bestride link according to the power dissipation specific weight and attributes dynamic power dissipation to bit flipping activities which are triggered when a present data film arrives, and numbers the power dissipation by the bit flipping activities to obtain the router power model. Considering that the implementation complexity which is required by the network-on-chip requirements to the power model is as low as possible, the invention can adopt the statistical average in stead of the instantaneous sampled value to obtain a power dissipation simplified model. Hardware implementation methods of two power dissipation models are given out aiming at a five-channel rooter structure, the simplified model is introduced to a self-adaptive routing algorithm, which realizes the power dissipation distribution optimization of the network-on-chip. The router power model which is proposed by the invention has low algorithm complexity and simple realization, is suitable for network-on-chip, and can be used in research and application in the aspects of power dissipation performance statistics, the power dissipation distribution optimization, thermal protection and the like.

The invention relates to the technical field of networks on chip, and discloses a low-power-consumption adaptive routing method in a network on chip. The method comprises the following steps that: S1, distances between a source node and a destination node of a message in an x dimension direction and a y dimension direction are calculated respectively, if the sum of the distances is zero, routing is finished, otherwise, a step S2 is executed; S2, the network is divided into two virtual sub-networks x+y* and x-y*; and S3, the message enters into the virtual sub-network x+y* or x-y* for routing. In the method, the physical network is divided into two virtual sub-networks x+y* and x-y*, the interiors of the virtual sub-networks x+y* and x-y* both use a fully adaptive routing algorithm of the shortest path and a new EVC (Express Virtual Channel) flow control technology, data packets are injected into a corresponding virtual network according to the offset value of the destination node of the data packets relative to the source node, and the data packets are routed to the destination in a manner of adaptive routing. In the routing process of the data packets, an EVC is selected preferably, and an NVC (Normal Virtual Channel) is used when no idle EVC exists, so that the routing goes forward according to normal pipeline stages, the performance is improved and the power consumption is reduced.

The invention belongs to the technical field of distributed routing, and particularly relates to a data packet routing algorithm based on multi-agent deep reinforcement learning. In order to relieve the congestion condition in a computer network, an end-to-end adaptive routing algorithm is designed by using a multi-agent deep reinforcement learning technology, and each router completes data packetscheduling according to local information, so that the transmission delay of data packets is reduced. According to the method, firstly, a mathematical model of distributed routing is constructed, specific meanings of all elements in reinforcement learning are defined, then a neural network is trained, and finally algorithm performance testing is carried out in a simulation environment. Simulationexperiment results show that introduction of the deep neural network can mine feature information in an input network state, balance between an unblocked path and a shortest path is achieved, and compared with other common routing algorithms, shorter data packet transmission time delay is achieved.

The invention provides an adaptive DTN (Delay Tolerant Network) routing algorithm based on a resource-constrained condition. That is, an applicable routing algorithm is selected according to the current load of a node based on an adaptive routing algorithm of a node load by using a forward routing algorithm with a high transmission success rate and a flooding routing algorithm with low resource consumption; the algorithm is divided into two stages: a training stage and a transmission stage; 1), the training stage: the main task is to determine the node load and network load calculation parameters according to the selected routing algorithm, and determine a load interval applicable to each algorithm; and 2), the transmission stage: the main task is to calculate unexpired data according to a node load calculation formula defined in the training stage to obtain the node load, judge the load interval of the node load and the routing algorithm corresponding to the node interval; perform routing according to the routing algorithm; and meanwhile, update parameters required for calculating the node load defined in the training stage according to the routing condition of the hop, and update the corresponding load interval.

The invention discloses a fault-tolerant adaptive routing method based on an ant colony algorithm. The method comprises the steps of marking a position of each node in a two-dimensional network and setting a routing table; detecting a fault node, and computing a fault value and effective buffer length of an adjacent node of the fault node if the fault node exists; searching and obtaining one or more to-be-selected routing paths through utilization of an adaptive routing algorithm if the fault node does not exist; selecting the optimum routing path from the to-be-selected routing paths according to an assessment scale, and updating a pheromone routing table according to an ant colony routing algorithm; detecting whether a destination node arrives or not, and finishing routing if the destination node arrives; judging whether deadlock occurs in the routing path or not if the destination node does not arrive, and finishing routing if the deadlock occurs; and detecting the fault node againif the deadlock does not occur. On the basis of the ant colony algorithm, a path selection mechanism in the fault-tolerant adaptive routing method is optimized and the pheromone routing table is updated, under the condition that the fault node exists, data transmission delay of a whole network-on-chip is reduced, and network load balance is realized.

In view of the diversity of running applications of the network-on-chip, a heterogeneous network as a relatively flexible network structure can reduce the transmission delay of the network and improvethe system performance. An adaptive routing algorithm for a heterogeneous network-on-chip is invented, and a static routing algorithm and a dynamic adaptive routing algorithm are used in a matching manner to transmit data packets. Meanwhile, an optimization algorithm for the adaptive routing algorithm is also invented. According to the algorithm, improvement is made on the bufferless routing partadded to the adaptive routing algorithm, and second competition arbitration of a data microchip is used to reduce the misinformation probability of data microchip deflection. Therefore, the transmission delay of a data microchip in the network is reduced, and the network performance is improved.

As the scale of an integrated circuit is increased, the communication complexity of a network-on-chip is continuously improved, and the network performance is seriously influenced by the congestion problem caused by network hotspots and the like. How to measure the network congestion degree to avoid congestion nodes is a key problem in a network-on-chip adaptive routing algorithm. The invention provides a router time delay model, a building method and an on-chip network routing algorithm based on the router time delay model, the total time delay value of data from entering into a router node to leaving from the router node is evaluated, the router time delay model is built on the basis and serves as a standard for measuring node congestion, and a Q-learning reinforcement learning routing algorithm based on the router time delay model is provided. According to the routing algorithm provided by the invention, the latest global network state can be obtained in real time, the data can avoid a network congestion area, and the network performance is improved.

The invention provides a software-defined hardware control method and a controller, which are applied to a TSP architecture chip, and the control method comprises the following steps: S1, selecting an idle IP core on a TSP chip for a task to be processed to carry out task mapping, and dividing residual resources into a maximum residual resource block as an area for next task mapping; and S2, when the task mapping area in the TSP network-on-chip is updated, updating a transmission link between nodes in the network based on an adaptive routing algorithm. Through the task mapping and adaptive routing control scheme design provided by the invention, the resource utilization rate of the TSP chip can be improved.

An on-chip network is an on-chip interconnection way applied to a multi-core or many-core chip, and has the features of being high in bandwidth and high in expansibility. The invention provides a single-cycle on-chip network router design using the self-adaptive routing algorithm. The router only needs one cycle to forward a data packet, and the network load can be distributed more averagely through the self-adaptive routing at the same time. A straight channel on each direction avoids the deadlock problem caused by the self-adaptive routing. Through the design disclosed by the invention, therouter network acquires ultra-low transmission delay and extremely high throughput.