Self-adaptive routing single-cycle on-chip network router

A network-on-chip, self-adaptive technology, applied in the direction of data exchange network, digital transmission system, electrical components, etc., can solve problems such as network deadlock and implementation complexity

Inactive Publication Date: 2018-10-23
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Adaptive routing can balance the distribution of data packets in the network and improve network performance, b

Method used

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  • Self-adaptive routing single-cycle on-chip network router
  • Self-adaptive routing single-cycle on-chip network router
  • Self-adaptive routing single-cycle on-chip network router

Examples

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Embodiment Construction

[0014] figure 2 is a specific implementation of an output channel. Each cache unit has its own exclusive routing unit and control unit, which together are called a cache channel, and a dotted box in the figure is a cache channel. Since each cache channel uses the same structure, figure 2 Only one of the five cache channels is expanded in . In addition to buffer channels, an output channel also includes an arbitration control unit, a lower-level direction occupancy table, and a multiplexer, and these three modules are shared by all buffer channels.

[0015] The occupancy state of caches in each direction of the lower-level router is stored in the lower-level direction occupation table. After the circuit is reset, all directions are idle. When a buffer channel is outputting a data packet, it will occupy a direction, and the occupied direction will be recorded in the lower-level direction occupation table, and other buffer channels cannot request from this direction. Direct...

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Abstract

An on-chip network is an on-chip interconnection way applied to a multi-core or many-core chip, and has the features of being high in bandwidth and high in expansibility. The invention provides a single-cycle on-chip network router design using the self-adaptive routing algorithm. The router only needs one cycle to forward a data packet, and the network load can be distributed more averagely through the self-adaptive routing at the same time. A straight channel on each direction avoids the deadlock problem caused by the self-adaptive routing. Through the design disclosed by the invention, therouter network acquires ultra-low transmission delay and extremely high throughput.

Description

technical field [0001] The invention relates to the field of data transmission on a semiconductor chip. Background technique [0002] With the continuous improvement of integrated circuit technology, the number of transistors that can be accommodated in a single chip is increasing, and designers begin to use multiple processor cores on a chip. Such chips are called multi-core or many-core chips. Data communication is required between a huge number of cores, and the traditional bus communication structure has been unable to meet the needs of multi-core chips. Network on Chip (Network on Chip) has high bandwidth and good scalability, and is widely used in multi-core chips. [0003] A router (Router) is an important part of the on-chip network, and its function is to forward data. In a network-on-chip, a router has multiple ports, where the local port is connected to a processor core or other type of supporting property core, while other ports are used to connect to nearby ro...

Claims

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Application Information

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IPC IPC(8): H04L12/771H04L12/933H04L12/947H04L45/60
CPCH04L45/60H04L49/109H04L49/252H04L49/101H04L49/103
Inventor 袁驰坤黄乐天
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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