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Wafer defect detecting method

A detection method and wafer technology, applied in semiconductor/solid-state device testing/measurement, etc., can solve problems such as re-examination, achieve the effect of ensuring service life and improving scanning efficiency

Active Publication Date: 2011-06-08
CSMC TECH FAB2 CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] In view of this, it is necessary to address the problem that the traditional wafer defect detection method cannot be re-inspected after scanning, and provide a wafer defect detection method that can record the defect position and locate the defect in the subsequent review step

Method used

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Embodiment Construction

[0018] Such as figure 1 As shown, it is a processing flowchart of a wafer defect detection method. The method comprises the steps of:

[0019] S10: Positioning the wafer: acquiring the apex of the notch of the wafer, and adjusting the position of the wafer to move the notch to a predetermined position and direction.

[0020] Such as figure 2 As shown, is a schematic diagram of the exterior of the wafer 10 . The wafer 10 is circular and has a notch 11 on its edge, and the notch 11 can be used for positioning the wafer 10 in processes such as photolithography. When using the notch 11 to position the wafer 10 , a detection step of the notch 11 is involved, and the apex 12 of the notch 11 is determined. In order to facilitate the use of defect positions obtained by scanning, the wafer 10 is placed in the same orientation each time it enters the machine, so that the position information obtained by scanning can be used directly in re-inspection without conversion.

[0021] S2...

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PUM

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Abstract

The invention discloses a wafer defect detecting method, which comprises: a step of positioning a wafer, which is to acquire the peak of a notch of a wafer and adjust the position of the wafer to make the notch move to the predetermined position and direction; a step of scanning the whole wafer, acquiring and recording the position of the whole defect, which is to establish a coordinate system byusing the peak as a reference, represent the position of the defect by coordinates and record; a step of reading the position of the defect and finding the corresponding defect according to the position of the defect; a step of rechecking the defect and determining the type of each defect until all defects are processed. The coordinate system is established by taking the peak of the notch on the wafer as reference, the exclusive position of the defect on the wafer can be determined, the position of the defect recorded in the scanning process can be used for rechecking, and it is unnecessary to scan and recheck at the same time, so the scanning efficiency is improved, and the service life of the machine is guaranteed.

Description

【Technical field】 [0001] The invention relates to a method for detecting wafer defects in a semiconductor manufacturing process, in particular to a method for detecting defects on a wafer without patterns. 【Background technique】 [0002] Wafer defects have a fatal impact on product yield, so how to detect and improve wafer defects has a significant impact on semiconductor manufacturing processes. [0003] Wafer defect inspection generally includes two main steps: scanning and review. Scanning is to scan the entire wafer, determine the number and location of defects in advance, find the defects and identify the type of defects according to the number and location of the previously determined defects during the review, and take corresponding measures. [0004] For wafers engraved with patterns, since special patterns are engraved on them for alignment and positioning, the position of the defect can be recorded after scanning, and then positioned according to the special patte...

Claims

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Application Information

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IPC IPC(8): H01L21/66
Inventor 胡骏刘志成李健
Owner CSMC TECH FAB2 CO LTD