Semiconductor structure and manufacturing method thereof

Abstract

The present disclosure provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a semiconductor substrate having a device region and a dummy region adjacent the device region; a plurality of active regions in the device region; and a plurality of dummy active regions in the dummy region, where each of the active regions has a first dimension in afirst direction and a second dimension in a second direction perpendicular to the first direction, and the first dimension is substantially greater than the second dimension; and each of the dummy active regions has a third dimension in the first direction and a fourth dimension in the second direction, and the third dimension is substantially greater than the fourth dimension. The plurality of dummy active regions are configured such that thermal annealing effect in the dummy region is substantially equal to that of the device region.

Description

Technical field

[0001] The present invention relates to a semiconductor manufacturing process, and particularly relates to a semiconductor structure and its manufacturing method. Background technique

[0002] Semiconductor manufacturers process semiconductor wafers to form various integrated circuits in different areas of the wafer. These areas are called semiconductor grains. The integrated circuit formed in each semiconductor die includes a plurality of semiconductor components, which have active devices, such as transistors, diodes, or memory devices. Semiconductor components can also include passive components, such as resistors or capacitors. Various semiconductor processes can be used to form semiconductor components, such as etching, lithography, ion implantation, thin film deposition, or thermal annealing. However, the current integrated circuit and its manufacturing method using a thermal annealing process for a semiconductor wafer introduces the problem of uneven com...

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