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Methods of forming a plurality of conductive lines in the fabrication of integrated circuitry, methods of forming an array of conductive lines, and integrated circuitry

A technology of integrated circuits and conductive wires, applied in the manufacture of integrated circuits to form multiple conductive wires, form conductive wire arrays and the field of integrated circuits, which can solve unreliable and other problems

Active Publication Date: 2015-03-18
MICRON TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, due to factors such as optics and the wavelength of light or radiation, photolithography techniques tend to have a minimum pitch below which a particular photolithography technique cannot reliably form features

Method used

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  • Methods of forming a plurality of conductive lines in the fabrication of integrated circuitry, methods of forming an array of conductive lines, and integrated circuitry
  • Methods of forming a plurality of conductive lines in the fabrication of integrated circuitry, methods of forming an array of conductive lines, and integrated circuitry
  • Methods of forming a plurality of conductive lines in the fabrication of integrated circuitry, methods of forming an array of conductive lines, and integrated circuitry

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Embodiment Construction

[0035] refer to Figure 1 to Figure 17 Example embodiment methods of forming a plurality of conductive lines in the manufacture of integrated circuits are described. refer to figure 1 and figure 2 , with reference numeral 10 generally indicating a substrate fragment, for example a semiconductor substrate. In the context of this document, the terms "semiconductor substrate" or "semiconducting substrate" are defined to mean any construction comprising semiconducting materials and layers of semiconducting materials, alone or in assemblies comprising other materials , the semiconducting material includes, but is not limited to, bulk semiconducting material such as a semiconducting wafer (either alone or in an assembly comprising other materials thereon). The term "substrate" refers to any supporting structure including, but not limited to, the semiconducting substrates described above.

[0036]Substrate 10 includes a bulk semiconductor substrate 12, for example, single crysta...

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Abstract

A method of forming a pair of conductive lines in the fabrication of integrated circuitry includes forming a trench into a damascene material received over a substrate. Conductive material is deposited over the damascene material and to within the trench to overfill the trench. The conductive material is removed back at least to the damascene material to leave at least some of the conductive material remaining in the trench. Etching is conducted longitudinally through the conductive material within the trench to form first and second conductive lines within the trench which are mirror images of one another in lateral cross section along at least a majority of length of the first and second conductive lines. Other implementations are contemplated.

Description

technical field [0001] Embodiments disclosed herein relate to methods of forming a plurality of conductive lines in the fabrication of integrated circuits, to methods of forming arrays of conductive lines, and to integrated circuits independent of fabrication methods. Background technique [0002] Integrated circuits are typically formed on semiconductor substrates such as silicon wafers or other semiconducting materials. Typically, the integrated circuits are formed using layers of various materials that are semiconducting, conducting, or insulating. By way of example, the various materials are doped, ion implanted, deposited, etched, grown, etc., using various processes. A continuing goal in semiconductor processing is continued efforts to reduce the size of individual electronic components, thereby enabling smaller and denser integrated circuits. [0003] One technique for patterning and processing semiconductor substrates is optical lithography. This technique involve...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/8239
CPCH01L2924/0002H01L21/76883H01L21/76877H01L21/7682H01L21/76838H01L2924/00H01L21/768H10B99/00
Inventor 山·D·唐张明
Owner MICRON TECH INC