Method for packaging semiconductor

A packaging method and semiconductor technology, applied in radiation control devices, etc., can solve problems such as poor light reception and emission, and affect the overall performance of the chip, so as to achieve smooth reception and emission and improve the overall performance.

Inactive Publication Date: 2012-07-25
CHINA WAFER LEVEL CSP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] In the existing wafer-level packaging technology, such as the packaging of photosensitive chips, the photosensitive area of ​​the photosensitive area is often affected by the transparent substrate on it, making the reception and emission of light difficult, thus affecting the overall performance of the chip

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  • Method for packaging semiconductor
  • Method for packaging semiconductor

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Embodiment Construction

[0063] The present invention will be described in detail below in conjunction with specific embodiments shown in the accompanying drawings. However, these embodiments do not limit the present invention, and any structural, method, or functional changes made by those skilled in the art according to these embodiments are included in the protection scope of the present invention.

[0064] Furthermore, repeated reference numerals or designations may be used in different embodiments. These repetitions are only for the purpose of simply and clearly describing the present invention, and do not represent any relationship between the different embodiments and / or structures discussed.

[0065] In addition, the reference numerals related to the steps mentioned in the various embodiments of the present invention are only for the convenience of description, and there is no relationship of actual sequence. Different steps in each specific implementation manner can be combined in different se...

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Abstract

The invention discloses a method for packaging a semiconductor. The method includes steps: providing a substrate including an upper surface and a lower surface opposite to the upper surface, and arranging a photosensitive area and a welding pad which is electrically connected with the photosensitive area on the substrate; providing a temporary substrate, and forming a holding space capable of holding the photosensitive area at least on the temporary substrate; arranging adhesive on the surface, with the holding area, of the temporary substrate, adhering the surface of the temporary substrate on the upper surface of the substrate and leading the photosensitive area to be positioned in the holding space; forming a hole which is exposed out from the welding pad on the lower surface of the substrate; forming a conducting medium which is electrically connected with the welding pad in the hole; and stripping the substrate off from the temporary substrate. Compared with the prior art, the method has the advantages that a transparent substrate on the photosensitive area is removed, accordingly, light is received and transmitted smoothly, and integral performances of a chip are enhanced.

Description

technical field [0001] The invention belongs to the technology in the field of semiconductor manufacturing, and in particular relates to a semiconductor packaging method. Background technique [0002] Wafer Level Packaging (WLP) technology is a technology that performs packaging and testing on the entire wafer and then cuts it to obtain a single finished chip. The size of the packaged chip is exactly the same as that of the bare chip. Wafer-level chip-scale packaging technology has completely subverted traditional packaging such as ceramic leadless chip carrier (Ceramic Leadless Chip Carrier) and organic leadless chip carrier (Organic Leadless Chip Carrier). Small, short, thin and low-cost requirements. [0003] In the existing wafer-level packaging technology, such as the packaging of photosensitive chips, the photosensitive area of ​​the photosensitive area is often affected by the transparent substrate on it, making the reception and emission of light difficult, thereby ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/146
Inventor 王之奇王文龙喻琼俞国庆李海峰王蔚
Owner CHINA WAFER LEVEL CSP
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