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Method and device for realizing reliable upgrading of FPGA (field programmable gate array)

A gate array, reliable technology, applied in the direction of program control device, response error generation, program loading/starting, etc., can solve the problems of loading file damage, affecting the normal startup of field programmable gate array, etc., and achieve the effect of improving reliability

Inactive Publication Date: 2012-09-05
HUAWEI TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Upgrading the field programmable gate array is to upgrade the loading file in the peripheral memory. The general procedure is to erase the existing file in the memory first, and then write a new loading file. If the field programmable gate array is in the process The gate array is powered off, which may cause the loading file to be destroyed, thus affecting the normal startup of the field programmable gate array

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  • Method and device for realizing reliable upgrading of FPGA (field programmable gate array)
  • Method and device for realizing reliable upgrading of FPGA (field programmable gate array)
  • Method and device for realizing reliable upgrading of FPGA (field programmable gate array)

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Embodiment Construction

[0018] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0019] Embodiments of the present invention will be described below with reference to the accompanying drawings. The inventive idea of ​​the present invention is to store two identical logic loading files in partitions in the peripheral memory of the field programmable gate array, and when upgrading the loading files of the field programmable gate array, the two loading files are upgraded in sequence, thereby ensuring In the case of power failure, it can also ensur...

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Abstract

The invention discloses a method for realizing reliable upgrading of an FPGA (field programmable gate array). The method comprises the following steps of: writing an upgrading file into the first partition of a memory storing a loading file; after verifying that the upgrading file is successfully written into the first partition of the memory, writing the upgrading file into the second partition storing the same loading file in the memory; and after verifying that the upgrading file is successfully written into the second partition of the memory, ending the upgrading. The invention also discloses a device for realizing reliable upgrading of an FPGA. Through the invention, a complete loading file can be guaranteed when the FPGA experiences power failure at any time in the upgrading process, thus the next normal start of the FPGA is not influenced, and the upgrading reliability of the FPGA is improved; and the method and device are particularly suitable for remote upgrading.

Description

technical field [0001] The invention relates to the field of upgrading field programmable gate arrays, in particular to a method and device for realizing reliable upgrading of field programmable gate arrays. Background technique [0002] With the development of embedded technology in the communication field, field programmable gate array FPGA (Field Programmable Gate Array, Field Programmable Gate Array) as a logic control circuit Devices are increasingly used in the field of communication electronics. Due to the rapid update of technology, it is necessary to upgrade the field programmable gate array from time to time. Since the FPGA will lose its function when it is powered off, the logic load file required for the startup of the FPGA is usually stored in the peripheral memory, and the required load file is downloaded from the peripheral memory after the FPGA is powered on. file to enable startup. Upgrading the field programmable gate array is to upgrade the loading file...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/445G06F11/14
Inventor 刘海新程宇航雷永锋章浩亮
Owner HUAWEI TECH CO LTD
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