Transistor with buried fins

Abstract

The present invention disclosed a recessed gate transistor with buried fins. The recessed gate transistor with buried fins is disposed in an active region on a semiconductor substrate. Two isolation regions disposed in the semiconductor substrate, and sandwich the active region. A gate structure is disposed in the semiconductor substrate, wherein the gate structure includes: an upper part and a lower part. The upper part is disposed in the active region and a lower part having a front fin disposed in one of the two isolation regions, at least one middle fin disposed in the active region, and a last fin disposed in the other one of the two isolation regions, wherein the front fin are both elliptic cylindrical.

Description

technical field [0001] The invention relates to a recessed gate transistor, in particular to a recessed transistor with an elliptical columnar fin. Background technique [0002] As the size of device designs continues to shrink, the short-channel effect caused by the shortened gate channel length of transistors has become an obstacle to further increase the integration of semiconductor devices. In the past, methods have been proposed to avoid the short channel effect, such as reducing the thickness of the gate oxide layer or increasing the doping concentration, etc. However, these methods may simultaneously cause a decrease in device reliability or a change in data transmission speed slow and other issues, it is not suitable for practical application in technology. [0003] In order to solve these problems, a so-called recessed gate transistor device design has been developed and gradually adopted in the field, so as to improve the integration level of integrated circuits s...

AI Technical Summary

Problems solved by technology

However, the aforementioned recessed gate transistor devices still have many disadvantages, such as high gate-to-drain (or gate-to-source) capacitance and gate induced drain leakage (GIDL for short). ), insufficient driving current, and poor subthreshold swing (subthreshold swing or SS) characteristics, these are the reasons for the decline in device operation performance, so further improvement and improvement are required

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