Strain SiGe BiCMOS (Bipolar Complementary Metal-Oxide-Semiconductor Transistor) integrated device based on SOI (Silicon On Insulator) substrate and preparation method

A technology for integrating devices and devices, which is applied in the field of strained SiGe BiCMOS integrated devices and its preparation, can solve problems such as limiting the development of Si integrated circuit manufacturing processes, increasing the integration degree and complexity of device feature sizes, and not having the conditions to replace silicon-based processes, etc.

Inactive Publication Date: 2012-10-24
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, with the further increase of the scale of integrated circuits, the reduction of device feature size, the increase of integration and complexity, especially after the device feature size enters the nanometer scale, the limitations of materials and physical characteristics of SiCMOS devices have gradually emerged. , limiting the further development of Si integrated circuits and their manufacturing processes
Although microelectronics has made great progress in the research and application of compound semiconductors and other new materials in some fields, it is far from having the conditions to replace silicon-based processes

Method used

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  • Strain SiGe BiCMOS (Bipolar Complementary Metal-Oxide-Semiconductor Transistor) integrated device based on SOI (Silicon On Insulator) substrate and preparation method

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Experimental program
Comparison scheme
Effect test

Embodiment 1

[0126] Embodiment 1: the preparation of the strained SiGe BiCMOS integrated device and circuit based on the SOI substrate with a conductive channel of 45nm, the specific steps are as follows:

[0127] Step 1, epitaxial growth.

[0128] (1a) Select the SOI substrate sheet, the support material of the lower layer of the substrate is Si, the middle layer is SiO2, the thickness is 400nm, and the upper layer material is the doping concentration of 1×10 17 cm -3 N-type Si with a thickness of 150nm;

[0129] (1b) Using the method of chemical vapor deposition (CVD), grow a layer of N-type epitaxial Si layer with a thickness of 100nm on the upper layer of Si material at 750°C, as the collector region, and the doping concentration of this layer is 1× 10 17 cm -3 ;

[0130] (1c) Using chemical vapor deposition (CVD), grow a layer of SiGe layer with a thickness of 60nm on the substrate at 750°C. As the base region, the Ge composition of this layer is 25%, and the doping concentration...

Embodiment 2

[0200] Embodiment 2: the preparation of the strained SiGe BiCMOS integrated device and circuit based on the SOI substrate with a conductive channel of 30nm, the specific steps are as follows:

[0201] Step 1, epitaxial growth.

[0202] (1a) Select the SOI substrate, the support material of the lower layer of the substrate is Si, and the middle layer is SiO 2 , with a thickness of 300nm, and the upper material is doped with a concentration of 5×10 16 cm -3 N-type Si with a thickness of 120nm;

[0203] (1b) Using chemical vapor deposition (CVD), grow an N-type epitaxial Si layer with a thickness of 80nm on the upper Si material at 700°C as the collector region, and the doping concentration of this layer is 5× 10 16 cm -3 ;

[0204] (1c) Using chemical vapor deposition (CVD), grow a layer of SiGe layer with a thickness of 40nm on the substrate at 700°C. As the base region, the Ge composition of this layer is 20%, and the doping concentration is 1×10 19 cm -3 ;

[0205] ...

Embodiment 3

[0274] Embodiment 3: The strained SiGe BiCMOS integrated device and circuit based on SOI substrate that the conductive channel is 22nm is prepared, the specific steps are as follows:

[0275] Step 1, epitaxial growth.

[0276] (1a) Select the SOI substrate, the support material of the lower layer of the substrate is Si, and the middle layer is SiO 2 , with a thickness of 150nm, and the upper material is doped with a concentration of 1×10 16 cm -3 N-type Si with a thickness of 100nm;

[0277] (1b) Using chemical vapor deposition (CVD), grow a layer of N-type epitaxial Si layer with a thickness of 50nm on the upper Si material at 600°C, as the collector region, and the doping concentration of this layer is 1× 10 16 cm -3 ;

[0278] (1c) Using chemical vapor deposition (CVD), grow a layer of SiGe layer with a thickness of 20nm on the substrate at 600°C. As the base region, the Ge composition of this layer is 15%, and the doping concentration is 5×10 18 cm -3 ;

[0279] ...

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Abstract

The invention discloses a strain SiGe BiCMOS (Bipolar Complementary Metal-Oxide-Semiconductor Transistor) integrated device based on an SOI (Silicon On Insulator) substrate and a preparation method. The preparation method comprises the steps of: first, continuously growing an N-Si layer, a P-SiGe layer and an N-Si layer on the SOI substrate to prepare a deep trench isolation region; respectively carrying out photo-etching on a shallow trench isolation region of a collector region and a shallow trench isolation region of a base region; carrying out ion injection to form a collecting electrode contact region, a base electrode contact region and an emitting electrode contact region, and finally forming a SiGe HBT (Heterojunction Bipolar Transistor) device; carrying out photo-etching on an active region of an NMOS (N-channel Metal Oxide Semiconductor) device, and epitaxially growing five layers of materials in the region to form an active region of the NMOS device so as to prepare the NMOS device; carrying out photo-etching on an active region of a PMOS (P-channel Metal Oxide Semiconductor) device, and epitaxially growing three layers of materials in the region to form an active region of the PMOS device so as to form a virtual grid electrode, and injecting and forming a source electrode and a drain electrode of the PMOS device by a self-aligning process; and etching the virtual grid electrode to prepare the PMOS device so as to form the strain SiGe BiCMOS integrated device based on the SOI substrate and a circuit, wherein the conducting channel of an MOS (Metal Oxide Semiconductor) device is 22-45nm. According to the strain SiGe BiCMOS integrated device based on the SOI substrate and the preparation method provided by the invention, the characteristics of the anisotropic carrier mobility of the strain SiGe materials are adequately utilized so that the performance-enhanced strain SiGe BiCMOS integrated circuit is prepared.

Description

technical field [0001] The invention belongs to the technical field of semiconductor integrated circuits, in particular to a strained SiGe BiCMOS integrated device based on an SOI substrate and a preparation method. Background technique [0002] Semiconductor integrated circuits are the foundation of the electronics industry, and people's huge demand for the electronics industry has prompted the rapid development of this field. In the past few decades, the rapid development of the electronics industry has had a huge impact on social development and national economy. At present, the electronics industry has become the largest industry in the world, occupying a large share in the global market, and its output value has exceeded 1 trillion US dollars. [0003] SiCMOS integrated circuits have the advantages of low power consumption, high integration, low noise and high reliability, and occupy a dominant position in the semiconductor integrated circuit industry. However, with t...

Claims

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Application Information

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IPC IPC(8): H01L27/06H01L21/8249
Inventor宋建军张鹤鸣吕懿李妤晨胡辉勇宣荣喜舒斌郝跃
OwnerXIDIAN UNIV