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External extended DDR2 (Double Data Rate 2) read-write method on basis of FPGA (Field Programmable Gate Array) and external extended DDR2 particle storage on basis of FPGA

A granular memory, DDR2 technology, applied in the direction of memory address/allocation/relocation, etc., can solve the problem that DDR2 data storage technology is not universal, and achieve the effect of simple operation and simple interface operation

Active Publication Date: 2012-11-21
哈尔滨诺信工大测控技术有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to solve the problem that the existing DDR2 data storage technology does not have universality, and provide a method for reading and writing of externally expanded DDR2 based on FPGA and an externally expanded DDR2 granular memory based on FPGA

Method used

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  • External extended DDR2 (Double Data Rate 2) read-write method on basis of FPGA (Field Programmable Gate Array) and external extended DDR2 particle storage on basis of FPGA
  • External extended DDR2 (Double Data Rate 2) read-write method on basis of FPGA (Field Programmable Gate Array) and external extended DDR2 particle storage on basis of FPGA
  • External extended DDR2 (Double Data Rate 2) read-write method on basis of FPGA (Field Programmable Gate Array) and external extended DDR2 particle storage on basis of FPGA

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specific Embodiment approach 1

[0044] Specific implementation mode one: the following combination Figure 1 to Figure 3 Illustrate this embodiment, the method for reading and writing of the external expansion DDR2 based on FPGA described in this embodiment, the equipment involved in this method includes FPGA and DDR2,

[0045] The DDR2 control logic module 1 is set in the FPGA, and the DDR2 control logic module 1 controls the read and write operations of DDR2;

[0046] DDR2 control logic module 1 comprises WFIFO1-1, RFIFO1-2, DDR2 controller driving module 1-3 and DDR2 controller 1-4,

[0047] The method includes a write step and a read step:

[0048] The write step includes the following steps:

[0049] When WFIFO1-1 is idle, the steps of external logic writing data to WFIFO1-1;

[0050] After WFIFO1-1 completes the write operation, the step of sending the flag bit to the external logic;

[0051] When the DDR2 controller 1-4 is idle, the external logic sends a write DDR2 request signal to the DDR2 cont...

specific Embodiment approach 2

[0072] Specific implementation mode two: the following combination Figure 1 to Figure 3 Illustrate this embodiment, the externally expanded DDR2 particle memory based on FPGA described in this embodiment, it comprises FPGA and DDR2,

[0073] The DDR2 control logic module 1 is set in the FPGA, and the DDR2 control logic module 1 controls the read and write operations of DDR2;

[0074] DDR2 control logic module 1 comprises WFIFO1-1, RFIFO1-2, DDR2 controller driving module 1-3 and DDR2 controller 1-4,

[0075] WFIFO1-1: It is used to allow external logic to write data in the idle state; when the write operation is completed, the flag bit is sent to the external logic; the full data is read by the DDR2 controller driver module 1-3;

[0076] RFIFO1-2: used for DDR2 controller drive module 1-3, used to accept the read request of external logic, and output the data read from DDR2;

[0077] DDR2 controller driver module 1-3: used to receive the write DDR2 request signal sent by ex...

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Abstract

The invention relates to an external extended DDR2 (Double Data Rate 2) read-write method on the basis of a FPGA (Field Programmable Gate Array) and an external extended DDR2 particle storage on the basis of the FPGA, and belongs to the field of storage media. The invention aims to solve the problem that an existing DDR2 data storage technology does not have the universality. According to the invention, massive data generated in the high-speed data acquisition, the high-speed communication and the digital signal processing is stored in a large-capacity DDR2 storage unit through processing and conversion by the FPGA and is read when a request is made; storage and read control signals are completed by a DDR2 control logic in the FPGA; when external devices or other logic modules in the FPGA make a read-write request, the DDR2 control logic converts request signals into control signals of DDR2 particles and carries out corresponding conversion on read-write data and addresses to exchange data with the DDR2; and a core part of the hardware design is the logic design inside the FPGA and the part is implemented by adopting a Verilog language.

Description

technical field [0001] The invention relates to an FPGA-based read-write method of externally expanded DDR2 and an FPGA-based externally expanded DDR2 granular memory, belonging to the field of storage media. Background technique [0002] As one of the most widely used storage media, DDR2 has more advantages in stability and overall performance than other storage media. However, in applications such as high-speed data acquisition, communication and digital signal processing, the access to DDR2 particles through FPGA There are still many problems with technology. [0003] Summarizing and summarizing the existing DDR2 data storage technologies, there are some problems, and no unified and standard design ideas have been formed. Although each has its own characteristics, it is not universal. Contents of the invention [0004] The purpose of the present invention is to solve the problem that the existing DDR2 data storage technology does not have universality, and provide a me...

Claims

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Application Information

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IPC IPC(8): G06F12/02
Inventor 刘大同彭宇刘连胜见其拓刘川庞业勇
Owner 哈尔滨诺信工大测控技术有限公司
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