Transistor and forming method thereof
A transistor and semiconductor technology, applied in the fields of semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve the problems of limited improvement in transistor performance, low carrier mobility, limited stress, etc., and achieve improved mobility and stress layer. The effect of increasing, increasing stress
Active Publication Date: 2015-04-29
SEMICON MFG INT (SHANGHAI) CORP
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Problems solved by technology
[0009] However, the prior art method of forming silicon germanium in the source and drain regions of the transistor has limited stress, the improvement of carrier mobility is small, and the performance of the transistor is limited.
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[0035] It can be seen from the background art that the existing methods for forming transistors have limited ability to form silicon germanium in the source and drain regions to improve the mobility of carriers, resulting in a small driving current of the transistor and poor performance of the transistor.
[0036] The inventors of the embodiments of the present invention have found that in the prior art transistor formation method, trenches are formed on both sides of the gate structure by dry etching, and then silicon germanium material is filled into the trenches to form a stress layer. There is a problem with the method. After further research, the inventors of the embodiments of the present invention found that the stress in the transistor channel is closely related to the shape of the trench. When the trench protrudes to the side of the gate structure, the distance between the trench and the channel region The length is reduced, and the stress layer formed in this case ha...
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The invention provides a transistor comprising a semiconductor substrate, a grid electrode structure located on the surface of the semiconductor substrate, and ditch grooves located in the semiconductor substrates on the two sides of the grid electrode structure, wherein the ditch grooves comprise a first ditch groove located on the two sides of the grid electrode structure and in contact with the grid electrode structure, a second ditch groove located on the bottom part of the first ditch groove and in contact with the first ditch groove, and a third ditch groove located on the bottom part of the second ditch groove and in contact with the second ditch groove, and the second ditch groove protrudes towards one side of the grid electrode structure; and stress layers located in the ditch grooves. The stress of the ditch region of the transistor provided by the embodiment of the invention is increased, the migration rate of charge carriers is improved, and the performance of the transistor is reinforced.
Description
technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a transistor and a forming method thereof. Background technique [0002] With the rapid development of semiconductor manufacturing technology, semiconductor devices are developing towards higher component density and higher integration in order to achieve higher computing speed, larger data storage capacity, and more functions. Therefore, , the gates of complementary metal oxide semiconductor (Complementary Metal Oxide Semiconductor, CMOS) transistors are becoming thinner and shorter than before. In order to obtain better electrical performance, it is usually necessary to improve the performance of semiconductor devices by controlling the carrier mobility. A key element of the technology is controlling the stress in the transistor channel. For example, by properly controlling the stress and increasing the mobility of carriers (electrons in n-channel transist...
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IPC IPC(8): H01L29/78H01L29/06H01L21/336
Inventor 赵猛
Owner SEMICON MFG INT (SHANGHAI) CORP