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Integrated circuit guard rings

A technology of integrated circuits and guard rings, which is used in the manufacture of circuits, electrical components, semiconductor/solid-state devices, etc., and can solve problems such as no polysilicon structure, difficulty in meeting polysilicon density requirements, and uneven surface envelope.

Active Publication Date: 2012-12-12
ALTERA CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] To ensure that noise is properly suppressed, existing guard rings typically have a large width
[0006] This leads to manufacturing challenges
For example, it may be difficult to meet polysilicon density requirements in integrated circuits with guard rings of large width
Guard rings typically do not have a polysilicon structure, which can lead to uneven surface envelopes during chemical-mechanical polishing (CMP) operations

Method used

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  • Integrated circuit guard rings
  • Integrated circuit guard rings
  • Integrated circuit guard rings

Examples

Experimental program
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Embodiment 1

[0059] Additional Embodiment 1. A method of fabricating an integrated circuit having a substrate, the method comprising: forming a guard ring comprising a density compliant structure in the substrate; and polishing the integrated circuit, wherein the density compliant The structure ensures the flatness of the resulting polished surface.

Embodiment 2

[0060] Additional embodiment 2. The method of additional embodiment 1, wherein forming the guard ring includes forming a shallow trench isolation structure in the guard ring, wherein the density compliant structure includes the shallow trench isolation structure.

Embodiment 3

[0061] Additional embodiment 3. The method of additional embodiment 2, further comprising forming a polysilicon dummy gate structure on top of the shallow trench isolation structure, wherein the density compliance structure includes the polysilicon dummy gate structure. grid structure.

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PUM

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Abstract

Integrated circuits with guard rings are provided. Integrated circuits may include internal circuitry that is sensitive to external noise sources. A guard ring may surround the functional circuitry to isolate the circuitry from the noise sources. The guard ring may include first, second, and third regions. The first and third regions may include p-wells. The second region may include an n-well. Stripes of diffusion regions may be formed at the surface of a substrate in the three regions. Areas in the guard ring that are not occupied by the diffusion regions are occupied by shallow trench isolation (STI) structures. Stripes of dummy structures may be formed over respective STI structures and may not overlap the diffusion regions. The diffusion regions in the first and third regions may be biased to a ground voltage.; The diffusion regions in the second section may be biased to a positive power supply voltage.

Description

[0001] This application claims priority to and the benefit of US Patent Application 12 / 748,300, filed March 26, 2010. Background technique [0002] This application relates to integrated circuits, and more particularly, to integrated circuits with guard rings. [0003] An integrated circuit includes digital circuits, analog circuits and / or functional circuits formed on a semiconductor substrate. The area of ​​the circuit is usually surrounded by a guard ring. [0004] Guard rings are structures used to block unwanted signals. Typically, an integrated circuit has internal circuitry that is coupled to external devices through input and output pads. Noise can potentially leak from external devices through the pads onto internal circuitry. In this case a guard ring may be arranged around the internal circuit to isolate the internal circuit from noise. Guard rings can also be formed around noisy circuits to prevent noise from interfering with the operation of nearby circuits. ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/76H01L21/336
CPCH01L21/76229H01L21/31053
Inventor B·詹森C·Y·朱
Owner ALTERA CORP
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