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A comparator, the first technology, applied in the direction of instruments, special data processing applications, electrical digital data processing, etc., can solve the problem of resource consumption and speed
Inactive Publication Date: 2013-02-13
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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[0006] The purpose of the present invention is to solve the existing problems facing {2 n ,2 n -1,2 n +1} The...
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[0032] The present invention will be further elaborated below in conjunction with the accompanying drawings and specific embodiments.
[0033] RNS comparator structure of the present invention is as figure 1 , where 1 is the first n-bit inverter array, and 2 is the modulo 2 n Adder, 3 for second n-bit inverter array, 4 for modulo 2 n -1 adder, 5 for the first n+1 bit inverter array, 6 for modulo 2 n +1 adder, 7 is the third n-bit inverter array, 8 is the second n+1-bit inverter array, 9 is a two-input XOR gate, and 10 is the first with cyclic carry (End-Around Carry, EAC) carry save adder (Carry Save Adder, CSA), 11 is the first operation module C, 12 is the second carry save adder with cyclic carry, 13 is 2n binary adder, 14 is the second operation Module E, 15 is the first 1-bit inverter, 16 is the two-input AND gate, and 17 is the second 1-bit inverter;
[0034] b1 is the input of n-bit inverter array 1, is the output of n-bit inverter array 1; a1 and modulo 2 n In...
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Abstract
The invention discloses a residue number systems (RNS) comparator, which comprises a first n-position phase inverter array, a modulus 2<n> adder, a second n-position phase inverter array, a modulus 2<n>-1 adder, a first n+1-position phase inverter array, a modulus 2<n>+1 adder, a third n-position phase inverter array, a second n+1-position phase inverter array, two input exclusive OR gates, a first carry save adder with end around carry, a second carry save adder with end around carry, a 2n-position binary adder, a first operational module, a second operational module, a first 1-position phase inverter, a second 1-position phase inverter and two input AND gates. According to the RNS comparator, subtraction operation is directly carried out in a residue number system, and an operation result in the residue number system is then converted to a binary system, so that the contrast process of the comparison is simplified, the resource consumption is reduced, and the operation speed is also improved.
Description
technical field [0001] The invention belongs to the field of computers and integrated circuits, in particular to the design of a comparator for a remainder system. Background technique [0002] Before introducing the comparator, first explain the remainder system (RNS, Residue Number Systems). The remainder system RNS is a numerical representation system that describes numbers through the remainder of a set of pairwise coprime remainder bases. by {m 1 ,m 2 ,...,m L} composed of L remainder bases, integer X, 0≤X<M, where M=m 1 × m 2 ×…×m L , there is a unique representation in the RNS system as X={x 1 ,x 2 ,...,x L}, in Denotes X for modulo m i remainder of . To operate on two operands in the remainder system, the operator is Θ, which can be defined as: [0003] {z 1 ,z 2 ,…,z L}={x 1 ,x 2 ,...,x L}Θ{y 1 ,y 2 ,...,y L},in Here Θ can be modular addition, modular subtraction or modular multiplication. In a remainder system these arithmetic operati...
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