A system-on-chip voltage island power supply pin assignment method

Abstract

The invention discloses a distribution method for power supply pins in a system on a chip (SOC). The distribution method has the advantages that according to physical graph distribution information of a voltage island and geometrical topology information of a macro module, on the basis of a spring model, a proposed method can be used for rapidly determining the position of power supply pins, the distribution method can be applied to the optimizing stage of rear graph arrangement, and is suitable for a coordinating and optimizing stage of graph arrangement; and additionally, by considering that a circuit macro module with larger current density is needed to be placed in a position nearer to the power supply pins to reduce voltage drop, the proposed method can be used for distributing different stiffness coefficients for a spring connected with the circuit macro module according to the current density, thus the energy balance point position of a spring system is affected, and the position of the power supply pins further affected. Compared with a traditional distribution method for power supply pins of the SOC, according to the proposed method, the voltage drop of the power supply network node of the voltage island in the SOC can be effectively reduced, therefore an optimizing method of automatic design for distributing the power supply pins of the voltage island in the SOC is enriched, and the cost of design is lowered. Practice proves that the power supply network voltage drop obtained by the distribution method can be effectively lowered.

Description

technical field [0001] The invention relates to an automatic design method of an on-chip system, in particular to a method for allocating power supply pins of a voltage island of the on-chip system. Background technique [0002] A system-on-a-chip (SoC) contains multiple circuit macromodules. The multi-voltage technology divides the circuit macromodules according to their functions and gathers them together in the physical layout to form a voltage island (Voltage Island, VI). And give the voltage that meets the performance requirements. Therefore, the system-on-chip can also be regarded as composed of several voltage islands operating at lower voltages. Since the dynamic power consumption is proportional to the square of the power supply voltage, the formation of voltage islands through multi-voltage technology can effectively reduce the dynamic power consumption of SoCs, and has become the mainstream method for low power consumption design of SoCs. [0003] Compared with ...

AI Technical Summary

Problems solved by technology

First of all, a voltage island only allows one power supply pin. This is mainly because for chips packaged in the form of wirebonded, the power supply pin must be placed on the edge of the chip, and the power supply pin must compete with other signal pins for limited space. The position of the pins, so that each voltage island has multiple power supply pins may not be satisfied; secondly, the position of the power supply pins needs to be allocated according to the physical layout information of the voltage island, and the position of the power supply pins cannot be preset

[0004] The distribution of power supply pins is directly related to the voltage drop of the power supply network nodes of the voltage island in the multi-voltage SoC. If the distribution is improper, the voltage drop will inevitably be too large, so that the insufficient power supply of the circuit macromodule in the voltage island will cause the circuit to fail.

In addition, in order to meet the voltage drop constraints, the wiring area consumed by the power network will also increase accordingly.

Images