A Heuristic Multi-Voltage Allocation Method for System-on-Chip
A system-on-chip and allocation method technology, applied in resource allocation, multi-programming devices, etc., can solve problems such as nonlinear rise of solution time, multi-CPU time, slow solution speed, etc., to achieve optimized power consumption, strong practical significance and practice Significance, effect of reducing design cost
Active Publication Date: 2018-01-23
NINGBO UNIV
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Problems solved by technology
Existing research generally uses deterministic solution methods, such as integer linear programming to complete multi-voltage distribution. Although the solution quality is guaranteed, it often consumes more CPU time, so the solution speed is slow
Especially as the size of SoC increases, integer linear programming requires more constraints, resulting in a non-linear increase in solution time
Method used
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Embodiment Construction
[0026] The present invention will be further described in detail below in conjunction with the accompanying drawings.
[0027] figure 1 Shown is a layout representation of the GSRC benchmark test circuit n10, which contains 10 circuit macroblocks {sb 0 , sb 1 ,...,sb 9}. figure 2 Shown is a schematic diagram of the interconnection connections of the GSRC benchmark test circuit n10.
[0028] The heuristic multi-voltage distribution method for the n10 SoC includes the following steps:
[0029] Step ①: The SoC consists of 10 circuit macromodules {sb 0 , sb 1 ,...,sb 9}, circuit macromodules are connected by interconnection lines, and the number of interconnection lines is N wires ,Depend on figure 2 It can be seen that N wires = 23, define WR slack (u,v) is the connecting circuit macroblock sb u and sb v The line delay margin of the interconnection line, the calculation formula is as follows:
[0030] WR slack (u, v) = tr v -d uv -ta u (1)
[0031] where tr ...
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The invention discloses a heuristic multi-voltage distribution method for a system on a chip. The heuristic multi-voltage distribution method has the advantages that the provided method based on a heuristic algorithm both considers quality and solving seed of a solving result. The heuristic multi-voltage distribution method comprises the following steps of firstly, arranging working voltage of all circuit macro modules to low voltage; secondly, drawing a fan-in / fan-out delay margin curve according to fan-in / fan-out delay margin information of each circuit macro module; thirdly, selecting a plurality of circuit macro modules to increase the working voltage in algorithm iteration through searching a wave crest and a wave trough in the curve; and lastly, when timing constraint of the system on the chip is satisfied, stopping the algorithm and outputting a current multi-voltage distribution result. In comparison with the conventional integral linear programming multi-voltage distribution method, the heuristic multi-voltage distribution method is capable of effectively accelerating the multi-voltage distribution, enriching an automatic design optimization method for multi-voltage distribution of the system on the chip and reducing the design cost at a smaller solving quality cost. Through example verification, the solving time for a CPU (Central Processing Unit), which is obtained by the method of the invention, is effectively reduced.
Description
technical field [0001] The invention relates to an automatic design method of a system on a chip, in particular to a heuristic multi-voltage distribution method of a system on a chip. Background technique [0002] A system-on-a-chip (SoC) is composed of a plurality of circuit macromodules, and the circuit macromodules are connected by interconnecting wires. Single-voltage technology requires all circuit macroblocks to function properly at this voltage, but some of these circuit macroblocks are non-critical blocks, ie are located on non-critical paths or run at lower frequencies. Therefore, multi-voltage technology reduces the working voltage of some of the non-critical modules, effectively reducing power consumption while ensuring that the SoC meets performance constraints, and has become the mainstream method for current low-power SoC design. [0003] Multi-voltage allocation is to allocate an operating voltage to each circuit macroblock, so that the power consumption can ...
Claims
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IPC IPC(8): G06F9/50
Inventor 储著飞夏银水王伦耀王健
Owner NINGBO UNIV