Liquid crystal display device, liquid crystal display panel and method for adjusting common voltage of liquid crystal display panel

Abstract

The embodiment of the invention discloses a method for adjusting common voltage of a liquid crystal display panel. The method comprises the following steps of a, providing the image data of the current line of the liquid crystal display panel, wherein the image data of the current line comprises a plurality of gray level values; b, carrying out the statistics of the gray level values, falling into the preset N groups of gray level ranges, of the image data of the current line, and sieving one group of gray level range containing maximum gray level values; and c, adjusting the common voltage corresponding to the image data of the current line, so as to enable the common voltage to be matched with one selected gray level in the sieved group of gray level range containing the maximum gray level values. The adjusting method has the advantage that the common voltage of each line on the liquid crystal display panel is matched with one selected gray level in one group of gray level range containing the maximum gray level values in the corresponding image data of each line, and then the flashing degree of pictures caused by the change of the voltage of pixel electrodes is reduced when the image data of each line is displayed, and the display effect of the liquid crystal display panel is further improved.

Description

technical field [0001] The invention relates to the field of liquid crystal display technology, in particular to a liquid crystal display device, a liquid crystal display panel and a method for adjusting a common voltage thereof. Background technique [0002] refer to figure 1 , figure 1 It is a schematic diagram of pixel connection in a commonly used TFT LCD in the prior art. In the figure, the gate of the thin film transistor is connected to the scan line gate line, the drain is connected to the data line data line, and the source is connected to the pixel electrode, and there is a parasitic capacitance Cgs between the gate and source of the thin film transistor, that is, the pixel electrode It is connected to the scan line gate line through the parasitic capacitance Cgs. Wherein, a parallel liquid crystal capacitor Clc and a storage capacitor Cst are connected between the pixel electrode and the common electrode, and the driving mode of the liquid crystal display panel...

AI Technical Summary

Problems solved by technology

[0008] Therefore, at the moment when the thin film transistor is turned off, the feed through voltage (feed though voltage) when the scan line gate line is turned off affects the pixel voltage of each pixel through the parasitic capacitance Cgs, which will cause the image data of each line on the liquid crystal display panel to correspond to The voltage across the parasitic capacitance Cgs of each pixel changes differently, so that the light transmittance of the liquid crystal display panel also changes differently, causing the phenomenon of screen flickering when the image data of each row on the liquid crystal display panel is displayed, which in turn affects the liquid crystal display. The display effect of the screen on the display panel

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