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Enabling Die Changes in Single-Fin Field-Effect Transistor Devices

A fin-type field effect and transistor technology, which is applied in the fields of semiconductor devices, semiconductor/solid-state device manufacturing, instruments, etc., can solve problems such as the limitation of fin-type field effect transistors

Active Publication Date: 2015-11-25
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The resolution of exposure tools limits the formation of smaller-sized device patterns
For example, forming Fin Field Effect Transistor (FinFET) devices with fewer than two fins is limited by limitations in the resolution of existing lithography
Thus, while current lithography techniques are generally adequate for their intended purposes, as device dimensions continue to shrink, current lithography techniques are not satisfactory in all respects

Method used

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  • Enabling Die Changes in Single-Fin Field-Effect Transistor Devices
  • Enabling Die Changes in Single-Fin Field-Effect Transistor Devices
  • Enabling Die Changes in Single-Fin Field-Effect Transistor Devices

Examples

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Embodiment Construction

[0035] The following disclosure provides a number of different embodiments or examples for implementing different features of the present invention. Specific examples of components and arrangements are described below to simplify the present disclosure. Of course, these are only examples and are not intended to limit the invention. For example, in the following description, forming a first component over or on a second component may include embodiments in which the first component and the second component are in direct contact, and may also include that other components may be formed between the first component and the second component An embodiment such that the first part and the second part are not in direct contact. Additionally, the present invention may repeat reference symbols and / or characters in multiple instances. This repetition is for simplicity and clarity, and does not in itself indicate a relationship between the various embodiments and / or configurations descr...

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Abstract

Methods for forming a single fin fin-like field effect transistor (FinFET) device are disclosed. An exemplary method includes providing a main mask layout and a trim mask layout to form fins of a fin-like field effect transistor (FinFET) device, wherein the main mask layout includes a first masking feature and the trim mask layout includes a second masking feature that defines at least two fins, the first masking feature and the second masking feature having a spatial relationship; and modifying the main mask layout based on the spatial relationship between the first masking feature and the second masking feature, wherein the modifying the main mask layout includes modifying the first masking feature such that a single fin FinFET device is formed using the modified main mask layout and the trim mask layout.

Description

technical field [0001] The present invention relates to the technical field of semiconductors, and more specifically, to a method for realizing the core modification of a single fin field effect transistor device. Background technique [0002] Integrated circuit (IC) technology is constantly improving. This improvement often involves reducing the size of the device to obtain lower manufacturing costs, higher device integration density, faster speed and better performance. Photolithography is often used to form the components in integrated circuit devices. Typically, an exposure tool passes light through a mask or reticle and onto the photoresist layer of the wafer, causing the photoresist layer to have the integrated circuit components therein Image. The resolution of exposure tools limits the formation of smaller sized device patterns. For example, forming Fin Field Effect Transistor (FinFET) devices with fewer than two fins is limited due to existing lithographic resolu...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/28H01L21/336
CPCH01L21/823431G03F1/38G03F1/70G03F7/70425G03F7/70466H01L21/845G06Q30/00H01L21/786H01L21/822H01L29/66795
Inventor 谢铭峰林以唐何嘉政张智胜
Owner TAIWAN SEMICON MFG CO LTD