Method for realizing counter counting control and network chip
A network chip and counting control technology, which is applied in digital data processing, message numbering/character counting, instruments, etc., can solve the problem of large computing burden on the processor, and achieve the effect of ensuring computing efficiency
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[0013] It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.
[0014] Such as figure 1 As shown, the system architecture diagram of the preferred embodiment of the network chip of the present invention. The network chip 1 is used to process network communication data, which may be a network processor (Network Processor, NP) or any other suitable network communication data processing chip.
[0015] The network chip 1 includes a processor 10 , a packet generator 11 , a message processing engine 12 and a counter 13 .
[0016] The counter 13 may be an internal or external memory (such as a static random access memory, etc.), which includes n bits of counting bits, and will overflow and reverse when it reaches 2n-1.
[0017] The processor 10 is configured to configure the packet generator 11 to configure the generation cycle of the counting scan message and the content of the counti...
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