Support vector memory access method for data reorganization by module

Abstract

Disclosed is a vector memory method capable of supporting modular reconstitution of data. The vector memory method includes increasing the modular reconstitution type MT domain in the basic vector Load / store instruction; to the vector Load instruction, executing a corresponding reconstitution mode when the MT is of the different value, performing modular reconstitution to data read from a VM (vector memory) and then writing the data into the VR(vector register); to the vector Store instruction, executing the corresponding reconstitution model when the MT is of the different value, and performing modular reconstitution to the data read from the VR and then writing the data into the VM. The width of the MT is 2 bits. Part of functions of a data shuffle and vector memory components of an SIMD (single instruction stream multiple data stream) processor can be combined, so that execution efficiency of algorithms represented by FFT (fast Fourier transform) on the SIDM processor can be improved remarkably while difficulty in mapping for programmers and code size of application programs can be reduced. Besides, by the vector memory method capable of supporting the modular reconstitution of data, the problem of vector access of complex data in the SIMD processor can be solved effectively.

Description

technical field [0001] The present invention mainly relates to the field of vector memory access components of processors adopting Single Instruction Stream Multiple Data Stream (SIMD) technology, and in particular refers to a vector memory access method that supports data recombination according to modules. Background technique [0002] SIMD technology can fully develop the parallelism of applications with low hardware overhead by using multiple processing units to share the same set of control components such as instruction fetching, decoding, address calculation, and memory access. Therefore, in current processors, such as General-purpose processors, graphics processors, and digital signal processors have been widely used. SIMD technology is divided into subword SIMD and vector SIMD. The former focuses on parallelism between multiple bytes or halfwords in a word, and the latter focuses on parallelism among multiple words. Currently, processors using SIMD technology (here...

AI Technical Summary

Problems solved by technology

This limitation of instruction issue slots will reduce the execution efficiency of algorithms such as FFT

2) Shuffle components have limited bandwidth

However, due to the limitation of hardware overhead, Crossbar adopts a vector input and a vector output method during implementation, and the actual effective bandwidth is small.

3) There is an overhead in setting the shuffling mode

Although the multiple shuffling modes that Crossbar's shuffling component can provide, it is necessary to set and call different shuffling modes when using it, which introduces additional overhead

4) Irregular vector access problem of complex numbers

This will introduce additional shuffling operations after the vector Load / Store operation, thereby reducing the execution efficiency of the program

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