Method and device for eliminating clock jitter in analog-to-digital conversion and digital predistortion method

A technology of clock jitter and analog-to-digital conversion, applied in the direction of physical parameter compensation/prevention, improving amplifiers to reduce nonlinear distortion, etc., can solve the problem of deteriorating digital signal signal-to-noise ratio, affecting digital pre-distortion performance, and not considering the impact of clock jitter etc. to achieve the effect of improving linearization performance, eliminating clock jitter, and improving accuracy

Active Publication Date: 2016-06-01
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Application Information

AI Technical Summary

Problems solved by technology

However, the influence of the clock jitter introduced by the analog-to-digital converter in the feedback path is not considered in the traditional DPD method
Especially for wideband signals, this clock jitter will deteriorate the signal-to-noise ratio of the sampled digital signal and affect the performance of digital predistortion

Method used

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  • Method and device for eliminating clock jitter in analog-to-digital conversion and digital predistortion method
  • Method and device for eliminating clock jitter in analog-to-digital conversion and digital predistortion method
  • Method and device for eliminating clock jitter in analog-to-digital conversion and digital predistortion method

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Embodiment Construction

[0047] All features disclosed in this specification, or steps in all methods or processes disclosed, may be combined in any manner, except for mutually exclusive features and / or steps.

[0048] Any feature disclosed in this specification, unless specifically stated, can be replaced by other equivalent or similar purpose alternative features. That is, unless expressly stated otherwise, each feature is one example only of a series of equivalent or similar features.

[0049] Such as figure 1 , figure 2 , an embodiment of the method for eliminating clock jitter in the analog-to-digital conversion process includes:

[0050] Step 1: Receive an analog signal z(t) 109 .

[0051] Step 2: Provide clock signal h(t)205 to the analog-to-digital conversion module, h(t)=cos(2πf s t+β(t)), f s Represents the clock frequency of the selected crystal oscillator (this value is a known value), and β(t) represents the phase noise. At the same time, the product of the clock signal h(t) 303 a...

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Abstract

The invention discloses a method and device for eliminating clock jitter in analog-to-digital conversion and a digital pre-distortion method and relates to the pre-distortion technology in the communication field. The method for eliminating clock jitter in analog-to-digital conversion is characterized by comprising the steps that step 1, an analog signal z (t) is received; step 2, a clock signal h (t) is offered to an analog-to-digital conversion module, meanwhile, an arithmetic product of the clock signal h (t) and a single-tone signal m (t) serves as a reference signal q (t) and is added to the analog signal z (t), so that a composite signal r (t) is obtained; step 3, analog-to-digital conversion is conducted on the composite signal r (t) through the analog-to-digital conversion module, so that two completely identical composite signals rjit (n) are obtained; step 4, after a jitter sequence of one of the two composite signals rjit (n) is estimated, a clock jitter sequence is obtained; step 5, clock jitter elimination is conducted on the other of the two composite signals rjit (n) through clock jitter sequence, so that a purified digital signal y (n) with clock jitter eliminated is obtained.

Description

technical field [0001] The present invention relates to the predistortion technology in the field of communication, in particular to a method and device for eliminating sampling clock jitter interference in a digital predistortion feedback path, and a predistortion method for eliminating clock jitter interference. Background technique [0002] The power amplifier (PowerAmplifierPA) is one of the core components in the modern mobile communication system, and its performance directly affects the performance of the wireless communication system. To improve efficiency, amplifiers usually operate in a high-efficiency region close to the saturation point, where nonlinear characteristics exist in the amplifier. Since the current communication signal has a non-constant envelope, intermodulation distortion and spectrum growth will occur after nonlinear amplification, which will cause adjacent channel interference and deteriorate the bit error rate of the receiver. To solve this prob...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M1/08H03F1/32
Inventor 刘颖潘文生邵士海唐友喜
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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