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An error amplifier circuit

A technology of error amplifiers and operational amplifiers, applied in differential amplifiers, DC-coupled DC amplifiers, etc., can solve the problems of small amplifier output current, slow transient response, and complex compensation network design, and achieve small offset voltage and increase stability , Improve the effect of response speed and accuracy

Inactive Publication Date: 2017-03-29
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The traditional error amplifier is designed as a voltage type, which ensures a high gain of the loop and can obtain sufficient phase margin to stabilize the system, but the output current of the amplifier is small and the transient response is slow, and the design of the compensation network is complicated

Method used

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Embodiment Construction

[0040] Below in conjunction with accompanying drawing, the technical scheme of the present invention is described in detail:

[0041] like figure 2 As shown, an error amplifier circuit according to the present invention includes a first transconductance amplifier, a second transconductance amplifier, a first mirror current, a second mirror current and a first capacitor C1. The input terminal is the first input terminal Vref of the error amplifier circuit, the output terminal is connected to the first mirror current, the input terminal of the second transconductance amplifier is the second input terminal Vin of the error amplifier circuit, and the output terminal is connected to the second mirror current, The output end of the first mirror current and the output end of the second mirror current are connected to one end of the first capacitor C1 as the output end Vea of ​​the error amplifier circuit, and the other end of the first capacitor C1 is grounded.

[0042] like imag...

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PUM

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Abstract

The invention belongs to the field of electronic technology and relates to integrated circuit design technology, in particular to a novel current sinking / pulling out error amplifier circuit. The present invention comprises a first transconductance amplifier, a second transconductance amplifier, a first mirror current, a second mirror current and a first capacitor C1, and the input terminal of the first transconductance amplifier is the first of the error amplifier circuit. The input terminal Vref and the output terminal are connected to the first mirror current, the input terminal of the second transconductance amplifier is the second input terminal Vin of the error amplifier circuit, the output terminal is connected to the second mirror current, and the output terminal of the first mirror current is connected to the second mirror current. The output terminals of the two mirror currents are connected to one terminal of the first capacitor C1 as the output terminal Vea of ​​the error amplifier circuit. The beneficial effect of the invention is that the output voltage can be adjusted, the response speed and precision of the system are improved, and the stability of the system is increased. The invention is particularly applicable to error amplifiers.

Description

technical field [0001] The invention relates to integrated circuit technology, in particular to a novel error amplifier circuit with current sinking / pulling out. Background technique [0002] The error amplifier has always been the core circuit of the converter in the switching power supply, which has an important influence on the fast, accurate and stable operation of the system. [0003] Traditional error amplifiers such as figure 1 As shown, the traditional error amplifier includes biased PMOS transistors M6, M7, input PMOS transistors M1, M2, NMOS transistors M3, M4, M5; wherein the PMOS transistor M1 and the source of M2 are connected to form a differential pair, and connected to the M6 ​​transistor. source, M6 tube provides tail current to the op amp; the gates of PMOS tubes M1 and M2 are respectively used as the non-inverting input terminal V of the error amplifier in1 and the inverting input V in2 The gate of NMOS tube M3 and M4 are connected to form a current mir...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03F3/45
Inventor 方健谷洪波潘华彭宜建赵前利李源
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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