170 results about "Power noise" patented technology

This invention efficiently suppresses the power noise of an LSI. A semiconductor device includes first and second interconnection layers. The first interconnection layer has a source voltage supply line of a first potential positioned to extend along logic cells in a first direction. The second interconnection layer lies on an upper layer than the first interconnection layer and has plural source voltage supply lines of a second potential arranged adjacent to each other to form a group and positioned to extend in a second direction which is different from the first direction of interconnection. An interconnection line of the second potential is positioned on an upper layer than the first interconnection layer and interconnects at least two of the plurality of source voltage supply lines of the second potential. The interconnection line of the second potential is positioned to overlap the source voltage supply line of the first potential, to form a capacitor with the source voltage supply line of the first potential.

In a method of analyzing a power noise based on the circuit information of a semiconductor integrated circuit device, the power noise is analyzed in consideration of the influence of the impedance of a substrate. Consequently, the impedance of the substrate which has not been conventionally considered is taken into consideration. Thus, precision in the analysis can be enhanced more greatly.

The various embodiments of coaxial capacitors are self-aligned and formed in a via, including blind vias, buried vias and plated through holes. The coaxial capacitors are adapted to utilize the plating of a plated via as a first electrode. The dielectric layer is formed to overlie the first electrode while leaving a portion of the via unfilled. A second electrode is formed in the portion of the via left unfilled by the dielectric layer. Such coaxial capacitors are suited for use in decoupling and power dampening applications to reduce signal and power noise and/or reduce power overshoot and droop in electronic devices. For such applications, it is generally expected that a plurality of coaxial capacitors, often numbering in the thousands, will be coupled in parallel in order to achieve the desired level of capacitance.

Disclosed herein is a hybrid type sensor for detecting high frequency partial discharge which can detect high frequency partial discharge at a high signal-to-noise ratio without being influenced by power noise and surrounding noise, and guarantee the safety of a test when breakdown occurs. The sensor forms two or three signal paths with different impedances wherein a low frequency power signal is bypassed to ground through a first path, and a high frequency partial discharge current is allowed to flow through a second path and is detected as a resistance component through a resistor. Further, a surge voltage input to the sensor due to breakdown is input to the ground through a third path.

Embodiments of the invention provide a power-on reset function that establishes logic circuits in a memory chip at an initial stable state and a power-on read function that triggers a read operation of the memory chip. A first voltage detector output signal transitions when a power supply voltage reaches a first voltage, setting the logic circuits at the initial stable state. A second voltage detector output signal transitions when the power supply voltage reaches a second voltage, placing a latch in a set state that results in activation of a power-on read signal. A power-on read operation is carried out according to the activation of the power-on read signal. If the power supply voltage is not lowered below the first voltage, the second voltage detector output signal does not transition. Accordingly, embodiments are capable of preventing power-on read operations that are unnecessarily performed owing to power noise.

The invention relates to a micro-perforated plate with a resonant sound absorption structure. The micro-perforated plate with the resonant sound absorption structure is characterized by comprising a rigid wall, a micro-perforated plate and a cavity which is formed between the rigid wall and the micro-perforated plate, wherein the two ends of the rigid wall are connected with the two ends of the micro-perforated plate through a flexible or elastic material respectively. In the sound wave absorption process of the micro-perforated plate with the resonant sound absorption structure, the distancebetween the micro-perforated plate and the rigid wall can be automatically adjusted and a semi-active resonant sound absorption structure is formed in the cavity between the micro-perforated plate and the rigid wall along with the variation of sound wave frequency and the influence of vibrating air flow. Therefore, the micro-perforated plate with the resonant sound absorption structure has highersound absorption performance in a wider frequency range, the sound absorption frequency band of the micro-perforated plate with the resonant sound absorption structure is greatly expanded, and the defect of a narrower sound absorption frequency band of a sound absorber of the micro-perforated plate with a rigid structure can be overcome. The micro-perforated plate with the resonant sound absorption structure can be widely used for the sound absorber, mufflers and various sound absorption and insulation structures to treat a noise environment caused by air power noise.

An ESD (Electro-Static Discharge) protection circuit includes a detection unit for detecting a rising time of a signal flowing into a first and a second power lines; a pre-driver for buffering an output signal of the detection unit; and a power clamp which operates in response to an output signal of the pre-driver and connects the first and the second power lines each other. The detection unit includes: an RC filter connected in series between the first and the second power lines; a first inverter for inverting an output of the RC filter; and a first capacitor, connected between the first power line and a source end of a first transistor of the first inverter, for preventing a leakage current from flowing through the first transistor and a second transistor of the first inverter when a power noise is applied to the first and the second power lines.

A wake-up circuit of a memory device employs a cascade chain structure in which bit lines are divided into a plurality of blocks, and if the bit lines of one of the blocks are determined to have undergone a wake-up operation based on a bit line voltage fed back in the block, the wake-up operation is performed on a subsequent block. Accordingly, a wake-up delay can be varied, and therefore peak currents can be controlled, thereby reducing overall system power noise.

A printed circuit board (PCB) reduces a simultaneous switching noise (SSN) causing power noise, thereby reducing radiated electromagnetic interference (EMI). In a double-layered PCB, a first substrate is arranged in parallel with a second substrate while being spaced apart from the second substrate by a predetermined distance. The first substrate includes a ground plane, which is deposited over an entirety of the first substrate. The second substrate includes a power plane deposited at a position of a component mounted to the printed circuit board (PCB) to transmit power to the component. Thus, the power trace of the PCB is simplified in structure, thereby reducing EMI radiation noise.

A power noise detecting device includes a plurality of power lines, and a power noise detecting part configured to detect power noise by rectifying voltages of the plurality of power lines and converting the rectified voltages into effective voltages.

The invention publishes an ultralow temperature coefficient band-gap reference circuit based on mixed-mode high-order compensation, which comprises a band-gap reference current generating circuit, a feedback control loop, a temperature regulating circuit and an output circuit, wherein the band-gap reference current generating circuit comprises four PMOS (P-channel Metal Oxide Semiconductor) pipes, two NMOS (N-Mental Oxide Semiconductor) pipes, two resistors and two PNP (Plug-and-Play) triodes, the feedback control loop comprises two PMOS pipes, two NMOS pipes and two PNF (Power Noise Filter) triodes, the temperature regulating circuit comprises two NMOS pipes, and the output circuit comprises two PMOS pipes, four resistors and a PNP triode. The circuit has lower temperature coefficient, higher power supply rejection ratio and higher process stability.

The invention discloses a weak signal acquisition and processing circuit, which comprises an acquisition circuit, a front low-pass filter circuit, a 50-Hz interference signal filter circuit and a rear amplifying circuit which are connected in sequence. A weak current signal is converted into a corresponding voltage signal by using a high-precision operational amplifier, so that the weak signal can be effectively amplified, and error in acquisition is reduced. By connecting the low-pass filter with the 50-Hz interference signal filter circuit in series, power noise and signal noise produced by the acquisition circuit can be greatly reduced, and the accuracy for measurement is improved. In addition, the rear amplifying circuit provides amplifying channels for a plurality of feedback resistors, which can amplify for different multiples aiming at different levels of signals, so that the processed signal can be guaranteed within a measuring range of a singlechip.

The semiconductor integrated circuit device includes a plurality of decoupling cells that suppress power noise respectively, a plurality of power switches that connect the decoupling cells to a power line respectively, and a control circuit that controls the number of power switches selected from among the plurality of power switches and to be turned on according to power noise to be changed according to the operation state of each of internal circuits driven by a power supplied from the power line.

It is intended to provide a memory control device and memory control method capable of reducing charge/discharge current consumed while various commands are inputted to a semiconductor memory device and reducing occurrence of power noises. During periods TT1, TT2, and TT3 which are parts of a period tCKE in which a clock enable signal CKE is in active state, supply of a control clock SD_CLK from a memory control device 1 to a synchronous-type semiconductor memory device 12 can be stopped. Furthermore, in case an input of a data input/output period of an external command and that of refresh operation period of a refresh command RCMD overlap and an access region of the external command and that of the refresh command RCMD do not coincide, those commands are converted to control command signal SD_CMD in parallel, whereby parallel conversion processing operation can be conducted.

Objects are to provide a semiconductor device with a novel structure, to provide a semiconductor device with high resistance to noise, to provide a semiconductor device with a small chip area, and to provide a semiconductor device with low power consumption. In a memory cell included in a frame memory, a transistor containing an oxide semiconductor and a transistor containing silicon are used in combination to retain charge, whereby data is retained. In this structure, turning off the transistor containing an oxide semiconductor can prevent data fluctuations even if power noise through a wiring is generated.

A semiconductor device has a reduced number of external power terminals and is scaled down while suppressing power noise, and an electronic device is efficiently equipped with a bypass condenser. A package substrate has, on its surface, a semiconductor chip having a plurality of output circuits and at least one electrode for supplying a voltage to each of the output circuits, and is provided with external terminals on its back surface and has a plurality of wiring layers.

The invention discloses a band-gap reference voltage source with the high power rejection ratio. The band-gap reference voltage source comprises a voltage self-adjustment circuit, a starting circuit, a first-order temperature compensation reference voltage generating circuit, an error amplifier, a bias voltage generating circuit and a reference starting circuit. According to the band-gap reference voltage source, power noise is inhibited to a certain degree through the voltage self-adjustment circuit, then power is supplied to a back-stage band-gap reference circuit, the noise is further inhibited through the band-gap reference circuit, and therefore the whole power source has the quite high power rejection ratio. In addition, the voltage self-adjustment circuit further comprises a feedback loop, an output current can be automatically adjusted, and the problem that as the current required by the back-stage circuit is increased suddenly, the whole circuit is unstable is solved; meanwhile, the power rejection ratio of the band-gap reference voltage source can be increased; compared with a traditional band-gap reference voltage source, stability is better, the power rejection ratio is higher, and the band-gap reference voltage source can meet high-accuracy working requirements.

The invention discloses a voltage-to-current converter. The voltage-to-current converter comprises a first super source follower, a second super source follower and a current mirror image circuit. In the converter, output resistance is reduced by combining the two super source followers with the current mirror image circuit, and current is fed back to the super source followers to stabilize the super source followers through the current mirror image circuit to realize low impedance of an output end of the voltage-to-current converter; thus extremely high power supply rejection ratio can be obtained and good suppression effect on power noise can be achieved. The two super source followers are adopted to reduce the output voltage of the voltage-to-current converter and keep the output voltage close to input control voltage, so output of the converter can act on a current controlled oscillator of a metallic oxide semiconductor field effect transistor (MOSFET) device using low working voltage to improve the frequency of a voltage controlled oscillator.

A memory device includes first and second power supply pads configured to be connected to a power supply. The memory device further includes a data output circuit that receives power via the first power supply pad and outputs data responsive to an internal clock signal, and a delay-locked loop (DLL) circuit that receives power via the second power supply pad independently of the first power supply pad and that generates the internal clock signal responsive to an external clock signal.

The present invention discloses a system for detecting a battery voltage with high precision, of which a RC filter circuit or a PI type circuit is applied to a handheld hardware device for eliminating the effect of a power noise on a battery voltage detector of the handheld device, while an appropriate weight algorithm is used with the software of the handheld device, such that a conditional determination can be added to a remaining battery capacity parameter to compensate the effect of the fluctuated battery voltage caused by the consumed current, so as to detect the battery voltage with a high precision and allow users to determine the using time of the handheld device accurately.

Accuracy of sensing operations, such as read or verify, in a memory device is improved by avoiding fluctuations in a sense amp supply voltage which can occur when different sense amps are strobed at different times. First and second sets of sense amps perform a sensing operation on respective storage elements, such as in an all bit line configuration. The first set of sense amps is strobed at a first time point. In response, a sensed analog level is converted to digital data. The A/D conversion relies on the sense amp supply voltage being accurate. To avoid a fluctuation in the sense amp supply voltage, a bypass path allows the storage elements associated with the first set of sense amps to continue to draw power from the sense amp supply voltage. The second set of sense amps is strobed at a later, second time point.

Mechanisms to reduce noise and/or energy consumption in PAM communication systems, utilizing conditional symbol substitution in each burst interval of a multi-data lane serial data bus.